My Inquiry
My Account
STMicroelectronics STS9NF3LL
- Part No.:
- STS9NF3LL
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
STS9NF3LL.pdf
- Description:
- MOSFET N-CH 30V 9A 8SO
- Quantity:
- Payment:
- Shipping:
Inventory:9,332
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STS9NF3LL from STMicroelectronics is an N-channel 30 V, 9 A, 0.016 Ω (typ.) Power MOSFET in SO-8 package, optimized for high-efficiency CPU core DC/DC converters in mobile PCs. It features low gate charge (12.5 nC typ.), fast switching (tr = 32 ns), and reduced conduction & switching losses.
For engineers reviewing the STS9NF3LL datasheet, STS9NF3LL pinout, STS9NF3LL application, or STS9NF3LL equivalent, key selection criteria include RDS(on) @ 4.5 V (0.019 Ω), Qg trade-off, SO-8 thermal performance on FR-4, and suitability for synchronous buck high-side/low-side operation.
Technical Context
This MOSFET employs ST's StripFET™ II process with single feature size architecture, delivering optimal RDS(on) × Qg balance at 4.5 V gate drive. Its 0.016 Ω RDS(on) at VGS = 10 V and 0.019 Ω at VGS = 4.5 V enables efficient operation in space-constrained mobile motherboard VRMs.
The device integrates a robust body diode with trr = 23 ns and Qrr = 17 nC at Tj = 150 °C, supporting high-frequency synchronous rectification. Safe operating area (SOA) is pulse-width limited per 300 µs/1.5% duty cycle, validated for continuous 9 A drain current at TC = 25 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - supports input rails up to 24 V in buck converters with margin |
| RDS(on) @ VGS = 10 V | 0.016 Ω (typ.) - enables <150 mW conduction loss at 9 A |
| RDS(on) @ VGS = 4.5 V | 0.019 Ω (max) - ensures stable operation with logic-level gate drivers |
| Qg | 12.5 nC (typ.) - reduces gate drive power and enables >1 MHz switching |
| tr/tf | 32 ns / 11 ns - minimizes overlap loss in synchronous buck topologies |
| Ptot @ TC = 25 °C | 2.5 W - requires thermal pad design on FR-4 with ≥0.5 in² copper |
| Ciss/Coss/Crss | 800 pF / 250 pF / 60 pF - supports stable EMI profile with moderate gate resistance |
Pinout & Package
STS9NF3LL is housed in a standard SO-8 surface-mount package (JEDEC MS-012AC), with exposed drain pad for thermal enhancement. Pin 1–4 are source terminals (internally paralleled), Pin 5–8 are drain terminals (internally paralleled), and Gate is on Pin 1 (shared with Source).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (G) | Gate | Control terminal; requires ≤±16 V drive; low Ciss enables fast turn-on with 4.7 Ω resistor |
| Pins 2–4 (S) | Source | Power return node; all three pins internally bonded to common source metallization |
| Pins 5–8 (D) | Drain | Main power path output; all four pins tied to exposed drain paddle for thermal dissipation |
Key Features
| Feature | Design Value |
|---|---|
| StripFET™ II process | Enables lowest RDS(on) × Qg product in SO-8 at 4.5 V drive |
| Low Qgd/Qg ratio | 4.5 nC / 12.5 nC = 36% - improves Miller immunity and dV/dt ruggedness |
| Body diode recovery | trr = 23 ns, Qrr = 17 nC - reduces shoot-through risk in synchronous rectification |
| Thermal resistance (Rthj-amb) | 50 °C/W on FR-4 with 0.5 in² Cu - defines minimum PCB copper area for 9 A continuous |
Applications
| Mobile PC CPU Core VRM | Laptop DDR Memory Power Rail |
|---|---|
Use Scenario: Dual-phase 1.2 V/25 A CPU core supply on ultra-thin notebook motherboards. IC Role / Device Role: High-side and low-side synchronous rectifier switch in buck converter stage. Use Value: 0.016 Ω RDS(on) and 12.5 nC Qg jointly reduce total power loss by ≥18% vs prior-gen SO-8 MOSFETs at 500 kHz. | Use Scenario: Point-of-load regulator supplying 1.5 V DDR2 memory with tight transient response. IC Role / Device Role: Low-side switch handling peak currents up to 9 A with minimal voltage droop. Use Value: Fast tf = 11 ns and low Coss = 250 pF enable clean turn-off during load transients without excessive ringing. |
| Embedded Graphics Core Supply | USB-C PD Secondary Side Sync FET |
Use Scenario: Dedicated 0.9 V GPU core rail in fanless industrial tablets. IC Role / Device Role: Low-RDS(on) switch in compact 300 kHz buck converter with forced-air cooling. Use Value: RDS(on) = 0.019 Ω @ 4.5 V allows direct drive from PWM controller without level shifter. | Use Scenario: 5 V/3 A secondary-side synchronous rectifier in 45 W USB-C PD adapter. IC Role / Device Role: Low-voltage-drop replacement for Schottky diode in LLC + SR topology. Use Value: VSD = 1.2 V at 9 A and trr = 23 ns minimize reverse recovery loss and improve light-load efficiency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF7470PBF | RDS(on) = 0.018 Ω @ 4.5 V; Qg = 14.2 nC; SO-8 package | Slightly higher gate charge increases driver loss at >1 MHz | Prefer when legacy IR footprint compatibility required over minimal Qg advantage |
| DMN3020LSD-13 | RDS(on) = 0.020 Ω @ 4.5 V; Qg = 10.5 nC; dual-N SO-8 | Dual-device layout saves board area but halves per-FET current rating | Prefer for space-constrained designs where 4.5 A per FET suffices and layout density is critical |
Compared with IRF7470PBF and DMN3020LSD-13, STS9NF3LL delivers the lowest RDS(on) × Qg product in SO-8 at 4.5 V, making it optimal for high-current, high-frequency CPU VRMs where thermal headroom and switching loss are co-constrained.
Availability
STS9NF3LL is available at Aetrix Electronics and suitable for mobile PC motherboard VRMs, laptop DDR memory power rails, embedded graphics core supplies, and USB-C PD secondary-side synchronous rectification requiring stable component supply across extended production cycles.
Supply support for STS9NF3LL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing analog, microcontroller, power, and sensor solutions for automotive, industrial, and consumer markets.
STS9NF3LL belongs to ST's StripFET™ II Power MOSFET product line, engineered specifically for high-efficiency, high-density DC/DC conversion in portable computing and embedded power systems.
FAQ
What is the maximum continuous drain current at 100°C case temperature?
The STS9NF3LL supports 5.6 A continuous drain current at TC = 100 °C, as specified in its Absolute Maximum Ratings table. This derating reflects junction-to-case thermal resistance and safe SOA limits under sustained high-temperature operation, not ambient conditions.
Can STS9NF3LL be used as a high-side switch with 3.3 V gate drive?
No - its gate threshold voltage (VGS(th)) is 1 V min, but RDS(on) rises sharply below 4.5 V. At 3.3 V, RDS(on) exceeds 0.035 Ω, increasing conduction loss by >100%. It requires ≥4.5 V gate drive for specified performance.
Is the SO-8 package lead-free and RoHS compliant?
Yes - STS9NF3LL is manufactured in a RoHS-compliant, lead-free SO-8 package per STMicroelectronics' 2001 product release documentation and subsequent compliance declarations. The device meets JEDEC J-STD-020 moisture sensitivity level 1.
Does STS9NF3LL have avalanche rating information in its datasheet?
No - the official STS9NF3LL datasheet (Rev. November 2001) does not specify unclamped inductive switching (UIS) or avalanche energy ratings. Designers must rely on SOA curves and external clamping for inductive loads.
STS9NF3LL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STripFET™ II
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 9A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 19mOhm @ 4.5A, 10V
- Vgs(th) (Max) @ Id:
- 1V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 17 nC @ 5 V
- Vgs (Max):
- ±16V
- Input Capacitance (Ciss) (Max) @ Vds:
- 800 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 2.5W (Tc)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
STS9NF3LL FAQ
1.How can I place an order for STS9NF3LL through Aetrix?
Please submit a Request for Quotation (RFQ) for STS9NF3LL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STS9NF3LL reliable?
The price and inventory of STS9NF3LL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STS9NF3LL is usually 5 days.
3.What payment methods are accepted for STS9NF3LL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STS9NF3LL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STS9NF3LL?
STS9NF3LL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STS9NF3LL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STS9NF3LL?
For technical support, including STS9NF3LL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STS9NF3LL requirements.
6.How does Aetrix verify that STS9NF3LL is sourced from the original manufacturer or authorized distributors?
All STS9NF3LL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STS9NF3LL meets industry standards.
7.What is the process for return or replacement of STS9NF3LL?
All STS9NF3LL units undergo pre-shipment inspection (PSI). If there is an issue with STS9NF3LL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STS9NF3LL part is unused and in its original packaging.
Return procedure for STS9NF3LL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STS9NF3LL Tags
-
BSZ180P03NS3EGATMA1
Infineon Technologies
-
SIRA14DP-T1-GE3
Vishay Siliconix
-
AO4419
Alpha & Omega Semiconductor Inc.
-
SISA14BDN-T1-GE3
Vishay Siliconix
-
PSMN9R5-30YLC,115
Nexperia USA Inc.
-
BUK9Y21-40E,115
Nexperia USA Inc.
-
RTQ035N03HZGTR
Rohm Semiconductor
-
FDMS7680
onsemi
-
RQ3E180BNTB
Rohm Semiconductor
-
STL6N2VH5
STMicroelectronics
-
DMPH4029LFGQ-7
Diodes Incorporated
-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
