STMicroelectronics STT3PF20V
- Part No.:
- STT3PF20V
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- SOT-23-6
- Datasheet:
-
STT3PF20V.pdf
- Description:
- MOSFET P-CH 20V 2.2A SOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:5,209
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Product details
Overview
STT3PF20V from STMicroelectronics is a P-channel enhancement-mode Power MOSFET in SOT23-6L package, rated for 20 V VDS, 2.2 A continuous drain current at TC = 25°C, and ultra-low 2.7 V gate threshold voltage. It delivers RDS(on) = 0.14 Ω @ VGS = 4.5 V and 0.20 Ω @ VGS = 2.7 V, enabling efficient low-voltage load switching in portable battery management systems.
For engineers reviewing the STT3PF20V datasheet, STT3PF20V pinout, STT3PF20V application, or STT3PF20V equivalent, key selection criteria include its 2.7 V logic-level gate drive compatibility, rugged avalanche capability, SOT23-6L footprint for space-constrained DC-DC converters, and verified performance in nomadic equipment battery protection circuits.
Technical Context
This device employs ST's StripFET™ II process with single-feature-size strip architecture, yielding high cell density and low on-resistance while maintaining robust safe operating area (SOA) under pulsed inductive loads. Its P-channel topology enables high-side switching without level-shifting circuitry in buck converter synchronous rectification and battery disconnect paths.
The MOSFET features fully specified dynamic parameters including Ciss = 315 pF, Coss = 87 pF, and Crss = 17 pF at VDS = 15 V, supporting predictable switching loss estimation. Gate charge values (Qg = 4.5 nC typ., Qgs = 1.2 nC, Qgd = 1.0 nC) are validated for 2.7–4.5 V drive conditions in low-power PMICs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 20 V - Maximum drain-source blocking voltage for 1-cell Li-ion and 12 V automotive auxiliary rail applications |
| RDS(on) @ VGS = 4.5 V | 0.14 Ω - Enables ≤310 mW conduction loss at 2.2 A, suitable for thermally constrained SOT23-6L PCB layouts |
| RDS(on) @ VGS = 2.7 V | 0.20 Ω - Confirmed operation with 2.7 V microcontroller GPIOs, eliminating need for gate driver ICs |
| VGS(th) | 0.6 V typ. - Ultra-low threshold supports reliable turn-on even with degraded gate drive margins |
| ID (continuous) | 2.2 A @ TC = 25°C - Validated current rating for sustained load switching in handheld power rails |
| Ptot | 1.6 W @ TC = 25°C - Thermal limit defined for FR-4 board with 1-inch² 2 oz. copper pad |
| Ciss | 315 pF - Input capacitance directly impacts gate drive strength requirements in high-frequency PWM control |
Pinout & Package
SOT23-6L package: 6-pin surface-mount outline with exposed drain pad (pin 4), compatible with standard automated pick-and-place and reflow processes. Dimensions per ST mechanical drawing: D = 2.80–3.10 mm, E = 2.60–3.00 mm, e = 0.95 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | Control terminal; accepts 2.7–12 V logic-level input; requires <100 nA leakage current handling |
| 2 (S) | Source | Reference node for gate drive; tied to higher potential in high-side switch configuration |
| 3 (D) | Drain | Power output node; electrically connected to exposed pad (pin 4) for thermal and current conduction |
| 4 (D) | Drain (exposed pad) | Primary thermal path to PCB; must be soldered to large copper pour for 78°C/W Rthj-amb |
| 5 (S) | Source | Second source connection; paralleled with pin 2 to reduce source inductance in fast-switching apps |
| 6 (G) | Gate | Redundant gate terminal; used for Kelvin gate sensing or noise immunity in critical switching nodes |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low VGS(th) | 0.6 V typical - Ensures guaranteed turn-on with weak 2.7 V MCU outputs, reducing external bias components |
| StripFET™ II process | High cell density + rugged avalanche rating - Delivers 2× SOA margin vs. conventional Trench MOSFETs under unclamped inductive switching |
| Logic-level gate drive | Operates down to 2.7 V VGS - Eliminates need for charge pump or level shifter in single-supply battery management ICs |
| SOT23-6L footprint | Standardized 6-pin layout with exposed drain - Enables drop-in replacement in existing designs using STP2-type footprints |
| Low Qg/Qgd ratio | Qgd/Qg = 22% - Improves Miller immunity and reduces risk of spurious turn-on during high dV/dt commutation |
Applications
| Battery Protection Circuit | Load Switch in Wearables |
|---|---|
Use Scenario: Reverse-current blocking and overcurrent shutdown in single-cell Li-ion packs for Bluetooth earbuds. IC Role / Device Role / Timing Role: P-channel high-side switch controlled by battery fuel gauge IC's enable signal. Use Value: 0.20 Ω RDS(on) at 2.7 V ensures <1.2 mW standby loss, extending shelf life without compromising fault response speed. | Use Scenario: Controlled power-up of sensor subsystems in smartwatches during activity mode transitions. IC Role / Device Role / Timing Role: Low-threshold load switch enabling precise sequencing between MCU and analog front-end. Use Value: 2.7 V gate compatibility allows direct GPIO control, removing external driver and saving 1.2 mm² PCB area. |
| DC-DC Converter Synchronous Rectifier | USB OTG Power Path Control |
Use Scenario: High-side synchronous rectification in 3.3 V buck converter supplying RF transceiver modules. IC Role / Device Role / Timing Role: Complementary switch to N-channel main FET, driven by integrated gate controller. Use Value: 315 pF Ciss and 4.5 nC Qg support 2 MHz switching with <5% duty-cycle penalty in light-load efficiency. | Use Scenario: Bidirectional power path arbitration between USB host and device battery in portable medical monitors. IC Role / Device Role / Timing Role: Back-to-back P-MOSFET pair configured for reverse-current isolation and VBUS negotiation. Use Value: Matched 0.14 Ω RDS(on) at 4.5 V ensures symmetric forward voltage drop (<60 mV) across both directions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel logic-level power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMG2305UVT | RDS(on) = 0.045 Ω @ 4.5 V; SOT-23-6 but no exposed drain pad | Higher current capability (4.2 A), but 35% larger thermal resistance (110°C/W) | Prefer when peak current >3 A is required and thermal pad routing is impractical |
| AO3401 | RDS(on) = 0.085 Ω @ 4.5 V; VGS(th) = 1.0 V min. - less margin at 2.7 V | Lower cost; wider VGS range but marginal turn-on at 2.7 V | Acceptable where gate drive is stable ≥3.0 V and RDS(on) tolerance >0.1 Ω is acceptable |
Compared with DMG2305UVT and AO3401, STT3PF20V uniquely balances ultra-low 2.7 V drive assurance, rugged SOA for inductive loads, and thermally optimized SOT23-6L with exposed drain-making it optimal for space- and reliability-critical battery-powered systems.
Availability
STT3PF20V is available at Aetrix Electronics and suitable for battery management in nomadic equipment, DC-DC converters, and USB power path control requiring stable component supply and long-term industrial availability.
Supply support for STT3PF20V includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing analog, MEMS, power, and microcontroller solutions for industrial, automotive, and consumer markets.
The STripFET™ series targets high-efficiency, low-voltage power switching applications-specifically engineered for compact, thermally constrained battery-powered devices requiring logic-level gate drive and avalanche ruggedness.
FAQ
What is the maximum safe operating temperature for STT3PF20V in continuous operation?
The STT3PF20V has a maximum storage and operating junction temperature of 150°C. For continuous operation at 2.2 A, thermal design must ensure junction temperature remains ≤150°C using the specified 78°C/W Rthj-amb on a 1-inch² 2 oz. copper pad. Derating to 1.39 A is required at TC = 100°C per absolute maximum ratings table.
Can STT3PF20V be used in place of an N-channel MOSFET in high-side switching configurations?
Yes-STT3PF20V is a P-channel MOSFET specifically designed for high-side switching without level-shifting circuitry. Its 2.7 V gate threshold and negative VGS polarity allow direct interface with microcontroller GPIOs referenced to system ground, unlike N-channel devices that require bootstrap or isolated gate drivers in high-side roles.
Does STT3PF20V have built-in ESD protection on the gate terminal?
No-STT3PF20V does not integrate gate ESD protection diodes. The gate-body leakage current is specified at ±100 nA at ±12 V, and the absolute maximum VGS is ±12 V. External gate resistors (≥10 Ω) and TVS clamping are recommended in systems exposed to handling or connector hot-plug events.
How is the SOT23-6L exposed drain pad (pin 4) intended to be connected on the PCB?
The exposed drain pad (pin 4) must be soldered to a dedicated, thermally optimized copper pour connected to the drain net. ST specifies this pad as the primary thermal path: omitting it increases Rthj-amb from 78°C/W to >120°C/W. Minimum recommended pad size is 1 inch² of 2 oz. copper on FR-4, with ≥4 thermal vias to inner ground planes.
STT3PF20V Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STripFET™ II
- Package/Case:
- SOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 2.2A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 2.7V, 4.5V
- Rds On (Max) @ Id, Vgs:
- 200mOhm @ 1A, 4.5V
- Vgs(th) (Max) @ Id:
- 600mV @ 250µA (Min)
- Gate Charge (Qg) (Max) @ Vgs:
- 4.7 nC @ 4.5 V
- Vgs (Max):
- ±12V
- Input Capacitance (Ciss) (Max) @ Vds:
- 315 pF @ 15 V
- FET Feature:
- -
- Power Dissipation (Max):
- 1.6W (Tc)
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
STT3PF20V FAQ
1.How can I place an order for STT3PF20V through Aetrix?
Please submit a Request for Quotation (RFQ) for STT3PF20V on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STT3PF20V reliable?
The price and inventory of STT3PF20V are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STT3PF20V is usually 5 days.
3.What payment methods are accepted for STT3PF20V?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STT3PF20V transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STT3PF20V?
STT3PF20V orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STT3PF20V order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STT3PF20V?
For technical support, including STT3PF20V datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STT3PF20V requirements.
6.How does Aetrix verify that STT3PF20V is sourced from the original manufacturer or authorized distributors?
All STT3PF20V products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STT3PF20V meets industry standards.
7.What is the process for return or replacement of STT3PF20V?
All STT3PF20V units undergo pre-shipment inspection (PSI). If there is an issue with STT3PF20V, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STT3PF20V part is unused and in its original packaging.
Return procedure for STT3PF20V:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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