Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

STMicroelectronics STU13N60M2

Name: STU13N60M2
Brand: STMicroelectronics
SKU: STU13N60M2
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STU13N60M2

Manufacturer:: STMicroelectronics

Category:: FETs, MOSFETs

Package:: TO-251-3 Short Leads, IPAK, TO-251AA

Datasheet:: STU13N60M2.pdf

Description:: MOSFET N-CH 600V 11A IPAK

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:1,225

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STU13N60M2 from STMicroelectronics is an N-channel 600 V, 350 mΩ typ. (380 mΩ max.), 11 A MDmesh M2 Power MOSFET in IPAK (TO-251) package, optimized for high-efficiency hard-switching and resonant converters in industrial SMPS, PFC stages, and auxiliary power supplies.

For engineers reviewing the STU13N60M2 datasheet, STU13N60M2 pinout, STU13N60M2 application, or STU13N60M2 equivalent, key selection criteria include its 17 nC total gate charge, 32 pF Coss, 125 mJ single-pulse avalanche energy, 1.14 °C/W RthJC, and Zener-protected gate-critical for robustness in high-voltage flyback and LLC topologies.

Technical Context

This device employs ST's MDmesh M2 strip layout and enhanced vertical structure to simultaneously reduce RDS(on) and output capacitance while maintaining high dv/dt ruggedness (50 V/ns). Its low Qgd (9 nC) and optimized Crss/Coss ratio support fast, low-loss switching with minimal voltage overshoot during turn-off.

The integrated body diode features 297 ns trr at 25 °C and 394 ns at 150 °C, with 2.8 μC Qrr, enabling reliable operation in discontinuous conduction mode (DCM) PFC and synchronous rectification where reverse recovery behavior directly impacts EMI and efficiency.

Key Specifications

Parameter	Value and Actual Design Meaning
V_DS	600 V - Withstands full-line transient surges in 400 V DC bus applications without derating.
R_DS(on) max	380 mΩ @ V_GS = 10 V, I_D = 5.5 A - Enables <1.5 W conduction loss at 11 A continuous drain current.
Q_g	17 nC - Reduces gate drive power and enables use of smaller, lower-cost gate drivers.
C_oss	32 pF - Low stored output capacitance minimizes turn-on switching loss in hard-switched topologies.
E_AS	125 mJ - Confirmed single-pulse avalanche capability supports unclamped inductive switching stress.
dv/dt ruggedness	50 V/ns - Ensures immunity to false turn-on during high-speed voltage transients in bridge-leg configurations.
R_thJC	1.14 °C/W - Allows direct heatsinking via tab for thermal management in compact 110 W dissipation designs.

Pinout & Package

IPAK (TO-251) package with isolated metal tab (DRAIN-connected), 3-pin single-ended configuration. Tab serves as primary thermal path and electrically connects to Drain.

Pin/Terminal	Circuit Role	Design Meaning
1 (G)	Gate	Control terminal; requires ≤±25 V drive; Zener-protected against overvoltage transients.
2 (D, TAB)	Drain / Heatsink Interface	Main high-side switching node; tab is electrically connected to Drain and provides primary thermal conduction path.
3 (S)	Source	Reference node for gate drive; source inductance must be minimized to avoid oscillation during fast switching.

Key Features

Feature	Design Value
MDmesh M2 technology	Combines ultra-low R_DS(on) and C_oss via optimized silicon vertical structure and strip layout.
100% avalanche tested	Each unit validated for E_AS ≥ 125 mJ-ensures reliability under unclamped inductive load conditions.
Zener-protected gate	Integrated gate-source Zener clamps transients up to ±25 V, eliminating need for external protection components.
Low Q_gd/Q_g ratio	Q_gd = 9 nC of total 17 nC Q_g - improves Miller immunity and enables stable operation at high dV/dt.
Optimized diode recovery	trr = 297 ns (T_J = 25 °C), Q_rr = 2.8 μC - reduces switching loss and EMI in DCM boost and flyback converters.

Applications

Industrial SMPS Primary Switch

PFC Boost Switch

Use Scenario: 600 V input offline flyback converter delivering 65 W at 100 kHz switching frequency in DIN-rail power supplies.

IC Role / Device Role / Timing Role: High-side main switch handling full AC line-referenced voltage and current stress.

Use Value: 380 mΩ R_DS(on) and 17 nC Q_g enable >90% efficiency at full load while maintaining thermal margin on small heatsinks.

Use Scenario: Active boost PFC stage in 300 W server PSU operating in critical conduction mode (CrM).

IC Role / Device Role / Timing Role: Fast-turning boost switch managing high peak currents and repetitive diode recovery stress.

Use Value: 32 pF C_oss and 297 ns trr minimize switching loss and audible noise during zero-current switching transitions.

LLC Resonant Half-Bridge

Auxiliary HV Supply Switch

Use Scenario: Upper switch in asymmetric half-bridge LLC resonant converter for telecom rectifier modules.

IC Role / Device Role / Timing Role: Hard-commutated high-side switch subjected to high dv/dt and body diode commutation.

Use Value: 50 V/ns dv/dt ruggedness and 125 mJ E_AS prevent spurious turn-on and ensure safe operation during resonant tank reversal.

Use Scenario: Standby power supply switch in 5 kW industrial inverter, powering control circuitry from 600 V DC bus.

IC Role / Device Role / Timing Role: Low-duty-cycle, high-voltage auxiliary switch requiring long-term reliability under partial-load stress.

Use Value: -55 to 150 °C T_stg/T_J range and 100% avalanche screening guarantee field longevity in thermally constrained enclosures.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage N-channel MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
STP13N60M2	TO-220 package; identical die, higher R_thJA (62 °C/W vs 100 °C/W), same R_DS(on), Q_g, and avalanche rating.	Better suited for through-hole prototyping or lower-power designs where PCB space allows larger footprint.	Select when mechanical mounting flexibility or legacy board compatibility outweighs thermal density requirements.
FDPF13N60NZ	650 V rating; 420 mΩ R_DS(on) max; 22 nC Q_g; no Zener gate protection; different C_oss profile (45 pF).	Higher voltage margin but higher conduction/switching loss; less robust gate drive interface.	Choose only if system-level overvoltage margin exceeds 50 V and gate driver includes discrete clamping.

Compared with STP13N60M2, STU13N60M2 offers superior thermal performance in surface-mount layouts; versus FDPF13N60NZ, it delivers lower losses and built-in gate protection-making it preferred for space-constrained, high-reliability industrial converters.

Availability

STU13N60M2 is available at Aetrix Electronics and suitable for industrial SMPS, PFC boost stages, and auxiliary HV power supplies requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle assurance.

Supply support for STU13N60M2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

This device belongs to ST's MDmesh™ M2 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-density switched-mode power conversion in demanding industrial and telecom infrastructure applications.

FAQ

Is STU13N60M2 suitable for zero-voltage switching (ZVS) topologies?

Yes. Its low C_oss (32 pF) and controlled C_oss profile enable predictable resonant tank behavior in LLC and phase-shifted full-bridge converters. The 120 pF C_oss,eq (0–480 V) ensures soft turn-on timing aligns with typical ZVS dead-time windows without excessive circulating current.

What is the maximum recommended gate resistor value for hard-switched 100 kHz operation?

For 100 kHz hard-switching with V_GS = 10 V drive, a 4.7 Ω gate resistor is validated per datasheet test conditions (td(on) = 11 ns, td(off) = 41 ns). Values above 10 Ω increase switching loss significantly; below 2.2 Ω risk ringing due to PCB inductance interacting with low Q_gd.

Does the IPAK package require solder paste stencil optimization for thermal pad reflow?

Yes. The exposed drain tab requires ≥75% solder coverage with 0.15 mm stencil aperture and Type 4 solder paste. Inadequate paste volume causes voiding that degrades R_thJC beyond the rated 1.14 °C/W, risking thermal runaway at >7 A continuous current.

Can STU13N60M2 replace STW13N60M2 in existing TO-247 designs?

No. STW13N60M2 uses TO-247 package with different pinout, thermal mass, and mounting mechanics. While electrically identical, STU13N60M2's IPAK footprint and tab geometry prevent drop-in replacement. Board redesign and thermal validation are required for migration.

STU13N60M2 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: MDmesh™ II Plus

Package/Case:: TO-251-3 Short Leads, IPAK, TO-251AA

Packaging:: Tube

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 600 V

Current - Continuous Drain (Id) @ 25°C:: 11A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 380mOhm @ 5.5A, 10V

Vgs(th) (Max) @ Id:: 4V @ 250µA

Gate Charge (Qg) (Max) @ Vgs:: 17 nC @ 10 V

Vgs (Max):: ±25V

Input Capacitance (Ciss) (Max) @ Vds:: 580 pF @ 100 V

FET Feature:: -

Power Dissipation (Max):: 110W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: TO-251 (IPAK)

STU13N60M2 FAQ

1.How can I place an order for STU13N60M2 through Aetrix?

Please submit a Request for Quotation (RFQ) for STU13N60M2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STU13N60M2 reliable?

The price and inventory of STU13N60M2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STU13N60M2 is usually 5 days.

3.What payment methods are accepted for STU13N60M2?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STU13N60M2 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STU13N60M2?

STU13N60M2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STU13N60M2 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STU13N60M2?

For technical support, including STU13N60M2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STU13N60M2 requirements.

6.How does Aetrix verify that STU13N60M2 is sourced from the original manufacturer or authorized distributors?

All STU13N60M2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STU13N60M2 meets industry standards.

7.What is the process for return or replacement of STU13N60M2?

All STU13N60M2 units undergo pre-shipment inspection (PSI). If there is an issue with STU13N60M2, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STU13N60M2 part is unused and in its original packaging.

Return procedure for STU13N60M2:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…