STMicroelectronics STU75N3LLH6-S
- Part No.:
- STU75N3LLH6-S
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-251-3 Short Leads, IPAK, TO-251AA
- Datasheet:
-
STU75N3LLH6-S.pdf
- Description:
- MOSFET N-CH 30V 75A IPAK
- Quantity:
- Payment:

- Shipping:

Inventory:2,393
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STU75N3LLH6-S from STMicroelectronics is an N-channel 30 V, 75 A Power MOSFET in Short IPAK package, featuring 4.2 mΩ RDS(on) at VGS = 10 V and 37.5 A, high avalanche ruggedness, low gate charge (17–23.8 nC), and optimized for high-efficiency DC-DC converters and motor control in industrial power supplies.
For engineers reviewing the STU75N3LLH6-S datasheet, STU75N3LLH6-S pinout, STU75N3LLH6-S application, or STU75N3LLH6-S equivalent, key selection criteria include RDS(on)/Qg trade-off, thermal resistance (Rthj-case = 2.5 °C/W), safe operating area under pulsed load, and compatibility with 4.5 V logic-level gate drive in compact board space.
Technical Context
This device implements ST's 6th-generation STripFET™ VI process with DeepGATE™ architecture, delivering industry-leading RDS(on) × Qg figure-of-merit. Its optimized gate structure reduces switching losses while maintaining robust short-circuit withstand capability up to 10 µs at 25 °C junction temperature.
The Short IPAK package provides enhanced thermal performance over standard IPAK (Rthj-case = 2.5 °C/W) and supports surface-mount assembly with solderable drain tab. The integrated body diode exhibits trr = 24 ns and Qrr = 16.8 nC under 100 A/µs di/dt, enabling efficient synchronous rectification and freewheeling in hard-switched topologies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDS | 30 V - Maximum blocking voltage compatible with 24 V nominal bus systems and automotive 12 V/24 V applications. |
| RDS(on) | 4.2 mΩ @ VGS = 10 V, ID = 37.5 A - Enables <1.6 W conduction loss at 75 A continuous current with adequate heatsinking. |
| Qg | 17–23.8 nC - Low total gate charge allows fast switching with modest gate driver output (e.g., 1 A peak) and reduced driver power dissipation. |
| ID (cont) | 75 A @ TC = 25 °C - Supports high-current loads such as BLDC motor phases or primary-side switches in high-power SMPS. |
| Rthj-case | 2.5 °C/W - Enables 60 W power dissipation with only 150 °C junction-to-case temperature rise, critical for compact thermal design. |
| trr | 24 ns - Fast body diode recovery minimizes switching loss and voltage overshoot during commutation in buck or half-bridge configurations. |
Pinout & Package
STU75N3LLH6-S is housed in a Short IPAK (TO-251AA) package with three leads and an exposed drain tab (pin 2) for thermal and electrical connection. The package features gull-wing leads compatible with reflow soldering and a compact 9.0 mm × 6.2 mm footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G) | Gate | High-impedance control terminal requiring ≤±20 V gate-source voltage; low input capacitance (Ciss = 1350–2030 pF) eases driver design. |
| 2 (D / TAB) | Drain (exposed metal tab) | Primary current path and thermal interface; must be soldered to PCB copper pour or heatsink for optimal Rthj-amb and power handling. |
| 3 (S) | Source | Reference node for gate drive and current sensing; connects to low-side return path in common-source topology. |
Key Features
| Feature | Design Value |
|---|---|
| RDS(on) × Qg benchmark | Industry-leading FoM enables >95% efficiency in 48 V–12 V buck converters at 100 kHz switching frequency. |
| High avalanche ruggedness | Rated for unclamped inductive switching (UIS) with guaranteed energy rating - eliminates need for external snubbers in relay drivers and solenoid controls. |
| Logic-level gate drive | Specified RDS(on) down to 6.5 mΩ @ VGS = 4.5 V - supports direct interfacing with 3.3 V/5 V microcontrollers without level-shifting. |
| Low gate drive power loss | Qgs + Qgd = 14.2–19.6 nC - reduces average gate drive power to <15 mW at 500 kHz, easing thermal management of gate drivers. |
Applications
| Industrial Motor Drives | Server VRMs |
|---|---|
|
Use Scenario: Half-bridge phase leg in 24 V BLDC motor controller for HVAC blowers and industrial fans. IC Role / Device Role / Timing Role: High-side and low-side switching element with fast turn-on/off (ton ≈ 30 ns, toff ≈ 37 ns) synchronized to PWM carrier. Use Value: 4.2 mΩ RDS(on) limits conduction loss to <1.2 W per FET at 50 A RMS, enabling fan operation at full speed with <30 °C case temperature rise. |
Use Scenario: Synchronous rectifier in multiphase 48 V–12 V buck converter for AI accelerator cards. IC Role / Device Role / Timing Role: Low-side switch in interleaved phase, driven by dedicated gate controller with dead-time optimization. Use Value: 24 ns reverse recovery time and 16.8 nC Qrr reduce shoot-through risk and crossover loss, improving conversion efficiency by 0.8% at 300 A output. |
| Automotive Body Control | UPS Inverters |
|
Use Scenario: Load switch for 12 V battery-fed lighting and actuator circuits in body control modules. IC Role / Device Role / Timing Role: Single-ended high-side or low-side power switch controlled via CAN/LIN interface MCU GPIO. Use Value: ±20 V VGS rating and 10 µA IDSS at 125 °C ensure reliable operation across automotive temperature range (-40 to 150 °C). |
Use Scenario: Output stage switch in 1 kVA online UPS inverter using H-bridge topology. IC Role / Device Role / Timing Role: Hard-switched power transistor operating at 16 kHz with 75 A peak current per half-bridge leg. Use Value: 300 A pulsed current rating and 175 °C max junction temperature support surge handling during battery backup mode without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel power MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRF7470PBF | RDS(on) = 4.5 mΩ @ 10 V, Qg = 26 nC, TO-251 package, no Short IPAK variant | Higher gate charge increases driver complexity; identical thermal resistance but larger outline (10.4 mm × 6.2 mm) | Prefer STU75N3LLH6-S when board space is constrained and gate drive current is limited. |
| IXTP75N30L2 | RDS(on) = 5.2 mΩ @ 10 V, Qg = 22 nC, TO-220AB package, higher Rthj-case = 3.0 °C/W | Requires through-hole mounting and larger heatsink; lower avalanche energy rating | Choose STU75N3LLH6-S for surface-mount production and improved thermal performance in space-constrained designs. |
Compared with IRF7470PBF and IXTP75N30L2, STU75N3LLH6-S delivers superior RDS(on) × Qg balance, smaller Short IPAK footprint, and lower thermal resistance-making it optimal for high-density, high-efficiency power stages where layout area and thermal headroom are critical.
Availability
STU75N3LLH6-S is available at Aetrix Electronics and suitable for industrial motor drives, server VRMs, automotive body control modules, and UPS inverters requiring stable component supply and long-term manufacturability.
Supply support for STU75N3LLH6-S includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs, discrete devices, and MEMS sensors for industrial, automotive, and consumer markets.
STU75N3LLH6-S belongs to the STripFET™ VI DeepGATE™ Power MOSFET product line, engineered specifically for high-current, high-frequency switching in power conversion systems demanding ultra-low conduction and switching losses.
FAQ
What is the maximum continuous drain current at 100 °C case temperature?
The STU75N3LLH6-S supports 47 A continuous drain current at TC = 100 °C, as specified in Table 2 of the datasheet. This derating reflects thermal limitations of the Short IPAK package and ensures safe operation within the 175 °C maximum junction temperature limit under sustained load conditions.
Does STU75N3LLH6-S require a gate resistor for EMI control?
A gate resistor (typically 4.7 Ω) is recommended to dampen ringing and limit dV/dt-induced shoot-through in bridge configurations. The device's Ciss = 1350–2030 pF and Qg = 17–23.8 nC make it sensitive to parasitic oscillation without proper gate network tuning, especially at >200 kHz switching frequencies.
Can STU75N3LLH6-S be used in synchronous rectification without external Schottky diodes?
Yes-the integrated body diode has trr = 24 ns and Qrr = 16.8 nC, enabling effective synchronous rectification in buck and LLC topologies up to 300 kHz. However, optimal performance requires precise gate timing to avoid cross-conduction, particularly when paired with high-di/dt loads.
Is the drain tab electrically isolated from the PCB ground plane?
No-the drain tab (pin 2) is internally connected to the MOSFET drain and must be electrically tied to the high-voltage node. When mounted on a PCB, it must be soldered to a dedicated copper pour referenced to the drain potential; isolation requires insulating thermal pads or ceramic substrates if galvanic separation is needed.
STU75N3LLH6-S Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- DeepGATE™, STripFET™ VI
- Package/Case:
- TO-251-3 Short Leads, IPAK, TO-251AA
- Packaging:
- Tube
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 75A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 5.9mOhm @ 37.5A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 17 nC @ 4.5 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1690 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 60W (Tc)
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-251 (IPAK)
STU75N3LLH6-S FAQ
1.How can I place an order for STU75N3LLH6-S through Aetrix?
Please submit a Request for Quotation (RFQ) for STU75N3LLH6-S on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STU75N3LLH6-S reliable?
The price and inventory of STU75N3LLH6-S are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STU75N3LLH6-S is usually 5 days.
3.What payment methods are accepted for STU75N3LLH6-S?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STU75N3LLH6-S transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STU75N3LLH6-S?
STU75N3LLH6-S orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STU75N3LLH6-S order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STU75N3LLH6-S?
For technical support, including STU75N3LLH6-S datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STU75N3LLH6-S requirements.
6.How does Aetrix verify that STU75N3LLH6-S is sourced from the original manufacturer or authorized distributors?
All STU75N3LLH6-S products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STU75N3LLH6-S meets industry standards.
7.What is the process for return or replacement of STU75N3LLH6-S?
All STU75N3LLH6-S units undergo pre-shipment inspection (PSI). If there is an issue with STU75N3LLH6-S, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STU75N3LLH6-S part is unused and in its original packaging.
Return procedure for STU75N3LLH6-S:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STU75N3LLH6-S Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

