My Inquiry
My Account
STMicroelectronics STW20NM50
- Part No.:
- STW20NM50
- Manufacturer:
- STMicroelectronics
- Category:
- FETs, MOSFETs
- Package:
- TO-247-3
- Datasheet:
-
STW20NM50.pdf
- Description:
- MOSFET N-CH 550V 20A TO247-3
- Quantity:
- Payment:
- Shipping:
Inventory:5,594
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STW20NM50 from STMicroelectronics is an N-channel 550 V, 20 A, 0.20 Ω RDS(on) MDmesh™ MOSFET in TO-247 package, designed for high-voltage switching in offline SMPS, PFC stages, and industrial inverters. It delivers high dv/dt immunity (15 V/ns), 100% avalanche tested operation, and low gate charge (40–56 nC) for efficient hard-switching.
For engineers reviewing the STW20NM50 datasheet, STW20NM50 pinout, STW20NM50 application, or STW20NM50 equivalent, key selection criteria include its 550 V breakdown rating, 0.20 Ω typ. on-resistance at VGS = 10 V, 10 A repetitive avalanche current, 650 mJ single-pulse avalanche energy, and TO-247 thermal resistance of 0.585 °C/W.
Technical Context
This MOSFET employs ST's MDmesh™ technology-combining Multiple Drain process with PowerMESH™ horizontal layout-to achieve ultra-low RDS(on) while maintaining high voltage ruggedness. Its 15 V/ns dv/dt rating and 100% unclamped inductive avalanche testing ensure robustness under transient overvoltage conditions.
The device features low dynamic capacitances (Ciss = 1480 pF, Coss = 285 pF, Crss = 34 pF) and tight threshold voltage distribution (3–5 V), enabling precise gate drive timing and reduced switching losses in high-frequency converters up to 100 kHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | 550 V - supports 400 V AC mains-derived bus voltages with 30% margin for surge transients |
| RDS(on) max | 0.25 Ω - ensures ≤5 W conduction loss at 20 A DC, critical for thermal management in enclosed power supplies |
| ID (TC = 25°C) | 20 A - rated continuous drain current at heatsink-mounted condition, defining PCB copper and heatsink sizing |
| EAS | 650 mJ - enables reliable operation during unclamped inductive switching events without external snubbers |
| Qg | 40–56 nC - determines gate driver peak current requirement (~12 mA avg. @ 100 kHz, RG = 4.7 Ω) |
| dv/dt | 15 V/ns - suppresses false turn-on in high-noise bridge-leg configurations with fast-rising node voltages |
| Rth(j-case) | 0.585 °C/W - allows junction temperature rise of ≤125°C above case at 214 W dissipation, guiding thermal interface design |
Pinout & Package
TO-247 package: isolated tab (drain), 3-pin through-hole mounting with 0.585 °C/W junction-to-case thermal resistance. Pin 1 = Gate, Pin 2 = Drain (tab), Pin 3 = Source.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (Gate) | Control electrode | Receives 10 V logic-level drive; 1.6 Ω gate input resistance minimizes oscillation risk with standard gate drivers |
| Pin 2 (Drain) | Main power terminal | Internally connected to metal tab; electrically tied to heatsink-requires isolation washer in grounded-heatsink layouts |
| Pin 3 (Source) | Reference node | Serves as return path for gate drive and load current; low-inductance layout essential for di/dt stability |
Key Features
| Feature | Design Value |
|---|---|
| MDmesh™ silicon architecture | Enables 0.20 Ω RDS(on) at 550 V-25% lower than conventional planar MOSFETs in same package |
| 100% unclamped avalanche tested | Guarantees minimum 10 A repetitive avalanche current and 650 mJ single-pulse energy without derating |
| Low Crss (34 pF) | Reduces Miller-induced shoot-through risk in half-bridge topologies operating above 50 kHz |
| Tight VGS(th) (3–5 V) | Ensures consistent turn-on timing across production lots, simplifying gate drive voltage margining |
| Low Qgd/Qg ratio (19/56 nC ≈ 34%) | Improves controllability during Miller plateau, supporting ZVS-assisted soft-switching designs |
Applications
| Server PSU Primary Switch | Industrial PFC Boost Stage |
|---|---|
Use Scenario: 3.3 kW telecom rectifier operating at 100 kHz with universal AC input (90–264 VAC). IC Role / Device Role / Timing Role: High-side switch in active clamp forward topology handling 20 A peak primary current. Use Value: 0.20 Ω RDS(on) limits conduction loss to 80 W at full load, while 15 V/ns dv/dt rating prevents spurious turn-on during clamp reset transitions. | Use Scenario: 3.5 kW three-phase motor drive front-end with interleaved boost PFC. IC Role / Device Role / Timing Role: Main switching element in 65 kHz boost converter stage regulating 750 V DC bus. Use Value: 650 mJ EAS withstands line surges without failure; low Ciss (1480 pF) reduces gate drive power to <150 mW per phase. |
| Solar Microinverter H-Bridge | UPS Inverter Output Stage |
Use Scenario: Single-phase 300 W microinverter converting 40–60 V PV input to 230 VAC grid output. IC Role / Device Role / Timing Role: Low-side switch in synchronous H-bridge delivering 1.5 A RMS output current at 50 kHz PWM. Use Value: Tight VGS(th) tolerance (3–5 V) ensures matched dead-time behavior across parallel devices; 10 A IAR supports anti-islanding fault clearing. | Use Scenario: Online double-conversion UPS with 10 kVA output and 94% efficiency target. IC Role / Device Role / Timing Role: Output inverter leg switch operating in 16 kHz SPWM mode with 20 A peak load current. Use Value: 0.585 °C/W Rth(j-case) enables direct-mount heatsinking to maintain Tj < 125°C at full load; low Qg reduces gate driver IC stress. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage power switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IXTH20N50L | RDS(on) = 0.22 Ω, Qg = 62 nC, avalanche rated but not 100% tested | Higher gate charge increases driver loss; lower dv/dt (10 V/ns) limits use in fast-transition bridges | Prefer when cost sensitivity outweighs avalanche robustness requirements |
| IPP60R099C6 | RDS(on) = 0.099 Ω, VDSS = 600 V, Coss = 420 pF, TO-220FP package | Lower RDS(on) improves conduction loss but higher Coss degrades hard-switching efficiency above 60 kHz | Choose for space-constrained designs where thermal budget permits TO-220FP mounting |
Compared with IXTH20N50L and IPP60R099C6, STW20NM50 offers superior avalanche ruggedness and optimized dynamic capacitance balance for 50–100 kHz industrial SMPS, whereas alternatives trade off either reliability (IXTH) or high-frequency switching performance (IPP60).
Availability
STW20NM50 is available at Aetrix Electronics and suitable for server PSUs, industrial PFC modules, solar microinverters, and UPS inverter output stages requiring stable component supply and long-term manufacturing continuity.
Supply support for STW20NM50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing analog, power, MCU, and sensor solutions for automotive, industrial, and consumer markets.
The STW20NM50 belongs to the MDmesh™M series-a family engineered specifically for high-efficiency, high-reliability 500–650 V power conversion in telecom, industrial, and renewable energy systems.
FAQ
What is the maximum safe operating junction temperature for STW20NM50?
The absolute maximum junction temperature is 150 °C, validated across all electrical parameters in the datasheet. Operation above this limit risks permanent degradation of RDS(on), threshold voltage shift, and reduced avalanche endurance. Thermal design must ensure Tj stays ≤145 °C under worst-case ambient and load conditions to maintain reliability.
Does STW20NM50 require a negative gate voltage for reliable turn-off?
No. The device is fully specified for 0 V to +10 V gate drive, with VGS(th) between 3 V and 5 V. A negative gate bias is not required for turn-off integrity. However, applying –5 V during off-state improves noise immunity in high-di/dt environments and reduces leakage during partial conduction faults.
Can STW20NM50 be paralleled for higher current capacity?
Yes-its positive temperature coefficient of RDS(on) (confirmed by normalized on-resistance vs. temperature curves) enables stable current sharing. Successful paralleling requires matched gate drive impedance, symmetrical PCB layout, and individual source resistors (0.05–0.1 Ω) to damp oscillations and equalize dynamic current distribution.
Is the TO-247 package lead-free and RoHS-compliant?
Yes. STW20NM50 conforms to RoHS Directive 2011/65/EU and is manufactured with lead-free terminations. The device meets JEDEC J-STD-020 moisture sensitivity level MSL3 and supports standard Pb-free reflow profiles with peak temperature ≤260 °C and 60-second dwell above 217 °C.
STW20NM50 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- MDmesh™
- Package/Case:
- TO-247-3
- Packaging:
- Tube
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 550 V
- Current - Continuous Drain (Id) @ 25°C:
- 20A (Tc)
- Drive Voltage (Max Rds On, Min Rds On):
- 10V
- Rds On (Max) @ Id, Vgs:
- 250mOhm @ 10A, 10V
- Vgs(th) (Max) @ Id:
- 5V @ 250µA
- Gate Charge (Qg) (Max) @ Vgs:
- 56 nC @ 10 V
- Vgs (Max):
- ±30V
- Input Capacitance (Ciss) (Max) @ Vds:
- 1480 pF @ 25 V
- FET Feature:
- -
- Power Dissipation (Max):
- 214W (Tc)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- TO-247-3
STW20NM50 FAQ
1.How can I place an order for STW20NM50 through Aetrix?
Please submit a Request for Quotation (RFQ) for STW20NM50 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STW20NM50 reliable?
The price and inventory of STW20NM50 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STW20NM50 is usually 5 days.
3.What payment methods are accepted for STW20NM50?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STW20NM50 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STW20NM50?
STW20NM50 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STW20NM50 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STW20NM50?
For technical support, including STW20NM50 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STW20NM50 requirements.
6.How does Aetrix verify that STW20NM50 is sourced from the original manufacturer or authorized distributors?
All STW20NM50 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STW20NM50 meets industry standards.
7.What is the process for return or replacement of STW20NM50?
All STW20NM50 units undergo pre-shipment inspection (PSI). If there is an issue with STW20NM50, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STW20NM50 part is unused and in its original packaging.
Return procedure for STW20NM50:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STW20NM50 Tags
-
BSZ180P03NS3EGATMA1
Infineon Technologies
-
SIRA14DP-T1-GE3
Vishay Siliconix
-
AO4419
Alpha & Omega Semiconductor Inc.
-
SISA14BDN-T1-GE3
Vishay Siliconix
-
PSMN9R5-30YLC,115
Nexperia USA Inc.
-
BUK9Y21-40E,115
Nexperia USA Inc.
-
RTQ035N03HZGTR
Rohm Semiconductor
-
FDMS7680
onsemi
-
RQ3E180BNTB
Rohm Semiconductor
-
STL6N2VH5
STMicroelectronics
-
DMPH4029LFGQ-7
Diodes Incorporated
-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
