STMicroelectronics STW23NM60N

Overview

STW23NM60N from STMicroelectronics is an N-channel 600 V, 0.150 Ω R_DS(on), 19 A continuous drain current Power MOSFET in TO-247 package, built on second-generation MDmesh™ technology. It delivers low gate charge (60 nC), high avalanche ruggedness (700 mJ), and fast switching (t_d(off) = 90 ns) for high-efficiency offline SMPS and PFC stages.

For engineers reviewing the STW23NM60N datasheet, STW23NM60N pinout, STW23NM60N application, or STW23NM60N equivalent, key selection criteria include its 600 V V_DSS, 0.150 Ω R_DS(on) at 10 V_GS, 60 nC total gate charge, 150 °C max junction temperature, and TO-247 thermal resistance of 0.83 °C/W (junction-to-case).

Technical Context

This device employs ST's second-generation MDmesh™ vertical structure combined with strip layout to minimize conduction and switching losses simultaneously. Its 2050 pF C_iss, 140 pF C_oss, and 8 pF C_rss enable high-frequency operation while maintaining voltage stability under hard-switching conditions.

The integrated source-drain diode features 1.3 V forward drop at 19 A and 470 ns reverse recovery time at 150 °C, supporting synchronous rectification and ZVS designs. The 100% avalanche-tested construction ensures robustness in unclamped inductive switching applications up to 9 A I_AS.

Key Specifications

Pinout & Package

STW23NM60N uses a TO-247 package with three leads: Gate (pin 1), Drain (pin 2), Source (pin 3). The metal tab (pin 2) is electrically connected to the Drain and serves as primary heat transfer path to heatsink.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Compared with STW20NK60Z and IPP60R190C7, STW23NM60N offers the lowest R_DS(on) × Q_g product in its class, making it optimal for medium-frequency, high-current applications where both conduction and switching losses must be minimized simultaneously.

Availability

STW23NM60N is available at Aetrix Electronics and suitable for industrial switched-mode power supplies, server AC-DC front-ends, and uninterruptible power supplies requiring stable component supply and long-term manufacturing continuity.

Supply support for STW23NM60N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and power applications.

STW23NM60N belongs to the MDmesh™ second-generation high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-power-density offline converters and industrial motor drives.

FAQ

What is the maximum recommended gate drive voltage for STW23NM60N?

The absolute maximum gate-source voltage is ±25 V, but ST specifies 10 V as the nominal drive level for full R_DS(on) specification. Operating above 15 V increases gate oxide stress without meaningful R_DS(on) improvement and risks long-term reliability degradation. For robust operation, 12–13 V is the practical upper limit with appropriate transient suppression.

Can STW23NM60N replace STP23NM60N in existing TO-220 designs?

No - STW23NM60N uses TO-247 packaging with different mechanical footprint, thermal mounting, and lead spacing than TO-220. While electrical specs are identical, PCB layout, heatsink interface, and creepage/clearance must be redesigned. Direct replacement requires mechanical redesign and thermal validation due to 0.83 °C/W vs 3.6 °C/W junction-to-case resistance difference.

Does STW23NM60N have integrated gate protection?

No - STW23NM60N lacks integrated gate Zener protection. External gate resistors (typically 10–47 Ω) and TVS diodes (e.g., P6KE15A) are required to clamp V_GS transients exceeding ±20 V, especially in high-dv/dt environments like PFC boost stages or half-bridge inverters.

What is the safe operating area (SOA) limitation at 100 °C case temperature?

At T_C = 100 °C, the continuous drain current is derated to 11.7 A, and the SOA is bounded by thermal limits-not avalanche-above 10 V_DS. For pulse operation, the device supports 76 A for ≤100 µs (duty cycle <1.5%) with proper heatsinking, per Figure 6 in the datasheet.