STMicroelectronics STW7N95K3

Overview

STW7N95K3 from STMicroelectronics is an N-channel 950 V, 1.1 Ω typ. (1.35 Ω max), 7.2 A MDmesh K3 Power MOSFET in TO-247 package, designed for high-voltage switching in offline SMPS, PFC stages, and industrial inverters. It features 100% avalanche tested ruggedness, 6 V/ns dv/dt capability, and Zener-protected gate.

For engineers reviewing the STW7N95K3 datasheet, STW7N95K3 pinout, STW7N95K3 application, or STW7N95K3 equivalent, key selection criteria include its 950 V breakdown voltage, low R_DS(on), fast 14 ns turn-on delay, 450 ns diode reverse recovery time, and TO-247 thermal resistance of 3.57 °C/W junction-to-case.

Technical Context

This device employs ST's optimized MDmesh K3 vertical structure to achieve ultra-low on-resistance while maintaining high voltage blocking. Its dynamic performance is characterized by 1031 pF input capacitance, 0.9 pF reverse transfer capacitance, and 34 nC total gate charge at 760 V drain voltage.

The integrated source-drain diode delivers 7.2 A continuous current with 1.6 V forward voltage and improved recovery (6 µC Q_rr at 25 °C), enabling efficient hard-switched topologies without external snubbers in many cases.

Key Specifications

Pinout & Package

STW7N95K3 uses a TO-247 package with three leads: Drain (Tab), Gate (Pin 1), Source (Pin 2). The metal tab is electrically connected to the Drain terminal and serves as the primary thermal path to heatsink.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Compared with STP7N95K3, STW7N95K3 delivers 4.3× better thermal resistance for high-power density designs; compared with IPP65R110CFD7, it provides 300 V higher blocking voltage at the cost of ~10× higher R_DS(on), making it optimal for 700–900 V industrial systems where SiC cost and complexity are prohibitive.

Availability

STW7N95K3 is available at Aetrix Electronics and suitable for industrial motor drives, telecom rectifiers, server PSU PFC stages, and EV charger front-end designs requiring stable component supply across multi-year production cycles.

Supply support for STW7N95K3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, with manufacturing facilities across Europe, Asia, and North America, serving automotive, industrial, and power markets.

This device belongs to the MDmesh K3 family-engineered specifically for high-voltage, high-efficiency switching in offline power conversion, emphasizing avalanche ruggedness and dynamic performance over raw speed.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STW7N95K3 supports 4.5 A continuous drain current at T_C = 100 °C, as specified in Table 1 of DS6077 Rev 2. This reflects thermal derating from the 7.2 A rating at 25 °C, based on its 3.57 °C/W junction-to-case thermal resistance and 150 °C maximum junction temperature limit.

Does STW7N95K3 include integrated gate protection?

Yes-the device integrates a Zener diode between gate and source, clamping V_GS to ±30 V. This eliminates the need for external gate protection components in most industrial applications, as confirmed in the "Features" section and absolute maximum ratings table of DS6077.

Can STW7N95K3 replace STP7N95K3 in existing TO-220 designs?

No-STW7N95K3 uses TO-247 packaging with different pinout (Drain on tab, Gate on Pin 1, Source on Pin 2) and mechanical footprint. Direct replacement would require PCB redesign, heatsink re-machining, and gate drive layout changes due to higher peak currents and altered parasitics.

What is the typical reverse recovery charge of the body diode?

The typical reverse recovery charge (Q_rr) is 6 µC at T_J = 25 °C, measured with I_SD = 7.2 A, di/dt = 100 A/µs, and V_DD = 60 V, as documented in Table 7 of DS6077 Rev 2. At 150 °C, Q_rr increases to 8 µC, reflecting temperature-dependent minority carrier lifetime.