Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

STMicroelectronics STWA40N95K5

Name: STWA40N95K5
Brand: STMicroelectronics
SKU: STWA40N95K5
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STWA40N95K5

Manufacturer:: STMicroelectronics

Category:: FETs, MOSFETs

Package:: TO-247-3

Datasheet:: STWA40N95K5.pdf

Description:: MOSFET N-CH 950V 38A TO247-3

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:3,085

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STWA40N95K5 from STMicroelectronics is a 950 V, 38 A N-channel high-voltage Power MOSFET in TO-247 long leads package, featuring 110 mΩ typical R_DS(on), 93 nC total gate charge, and 100% avalanche tested ruggedness. It delivers ultra-low FoM for high-efficiency switching in HV DC-DC converters, industrial SMPS, and photovoltaic inverters.

For engineers reviewing the STWA40N95K5 datasheet, STWA40N95K5 pinout, STWA40N95K5 application, or STWA40N95K5 equivalent, key selection criteria include its 950 V V_(BR)DSS, 700 mJ single-pulse avalanche energy, 4.5 V/ns diode recovery dv/dt rating, and Zener-protected gate structure - all critical for reliable operation in hard-switched HV topologies.

Technical Context

This MDmesh K5 device uses a proprietary vertical silicon structure to simultaneously minimize R_DS(on) and gate charge - achieving 110 mΩ @ 10 V and 93 nC Q_g at 760 V/38 A. Its 50 V/ns MOSFET dv/dt ruggedness and 13 A repetitive avalanche current support robust operation under transient overvoltage conditions.

The integrated body diode exhibits 1.5 V forward voltage at 38 A and 706 ns reverse recovery time (T_J = 25 °C), with Co(er) = 142 pF and Co(tr) = 398 pF enabling predictable snubber design. Thermal resistance R_thJC is 0.28 °C/W, supporting 450 W continuous dissipation at T_C = 25 °C.

Key Specifications

Parameter	Value and Actual Design Meaning
V_(BR)DSS	950 V - Withstands DC bus voltages up to 760 V with full safety margin in 600 V-class systems
R_DS(on) max	130 mΩ - Limits conduction loss to ≤ 188 W at 38 A, enabling compact heatsink design
Q_g	93 nC - Enables fast, low-loss switching with standard 1–2 A gate drivers
E_AS	700 mJ - Supports unclamped inductive switching without failure at rated current
dv/dt ruggedness	50 V/ns - Prevents spurious turn-on during high-slew-rate transients in bridge configurations
R_thJC	0.28 °C/W - Allows 450 W power dissipation with ≤ 126 °C junction rise above case temperature

Pinout & Package

TO-247 long leads package with isolated tab (drain-connected). Standard lead form supports through-hole mounting and high-current PCB routing. Tab provides direct thermal path to heatsink.

Pin/Terminal	Circuit Role	Design Meaning
D (Tab, Pin 2)	Drain	High-voltage power terminal; electrically and thermally coupled to metal tab for efficient heat transfer
G (Pin 1)	Gate	Control input; Zener-protected to ±30 V, requiring <5 Ω gate resistor for stable switching
S (Pin 3)	Source	Power return and reference node; connects to driver ground and current sense point

Key Features

Feature	Design Value
MDmesh K5 vertical structure	Reduces specific on-resistance by >30% vs prior K3/K4 generations while maintaining 950 V rating
Ultra-low FoM (R_DS(on) × Q_g)	12.1 Ω·nC - Enables higher frequency operation without compromising efficiency in 100–300 kHz SMPS
100% avalanche tested	Every unit validated to 13 A repetitive avalanche current and 700 mJ single-pulse energy
Zener-protected gate	Integrated gate-body Zener clamps transients to ±30 V, eliminating need for external gate protection

Applications

Industrial SMPS

Photovoltaic Inverters

Use Scenario: Primary-side switch in 3–5 kW off-line resonant LLC converters operating at 200–400 VDC input.

IC Role / Device Role / Timing Role: High-voltage synchronous rectifier replacement; handles 760 V peak drain stress during ZVS transitions.

Use Value: 130 mΩ R_DS(on) and 93 nC Q_g reduce combined conduction + switching loss by 22% vs comparable 1000 V Si MOSFETs.

Use Scenario: DC-link switching stage in string inverters converting 600–1000 V PV array output to grid-synchronized AC.

IC Role / Device Role / Timing Role: Hard-switched high-side switch in three-level NPC topology; sustains 50 V/ns dv/dt during commutation.

Use Value: 50 V/ns MOSFET dv/dt ruggedness and 100% avalanche testing ensure reliability across partial shading and lightning surge events.

EV Charging Stations

High-Voltage UPS Systems

Use Scenario: Isolation-stage switch in 15–30 kW AC/DC front-end modules for DC fast chargers.

IC Role / Device Role / Timing Role: Primary switch in phase-shifted full-bridge; operates continuously at T_J ≥ 125 °C.

Use Value: R_DS(on) drift of only +1.8× at 150 °C (per Fig. 9) maintains predictable thermal performance over lifetime.

Use Scenario: Bypass and hold switches in 480 VAC online double-conversion UPS systems with battery backup.

IC Role / Device Role / Timing Role: High-reliability main power switch handling 152 A pulsed fault currents during short-circuit events.

Use Value: 152 A pulsed drain current rating and 700 mJ E_AS enable safe shutdown without external crowbar circuitry.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage power switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IXTH40N90L2	900 V rating, 145 mΩ R_DS(on), 105 nC Q_g, no Zener gate protection	Limited to ≤ 720 V DC bus; requires external gate clamp; lower avalanche energy (420 mJ)	Prefer when cost sensitivity outweighs 950 V margin and gate protection needs
STW78N95	950 V rating, 100 mΩ R_DS(on), 120 nC Q_g, same TO-247 package, no avalanche test data published	Higher conduction loss at high T_J; lacks documented avalanche ruggedness validation	Select only if lower R_DS(on) dominates and system-level avalanche immunity is externally managed

Compared with IXTH40N90L2 and STW78N95, STWA40N95K5 uniquely combines 950 V rating, Zener gate protection, and 100% avalanche testing - making it the only option qualified for unclamped inductive switching in safety-critical 750 V+ industrial power supplies.

Availability

STWA40N95K5 is available at Aetrix Electronics and suitable for industrial SMPS, photovoltaic inverters, EV charging stations, and high-voltage UPS systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for STWA40N95K5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and analog ICs for industrial, automotive, and consumer markets.

This device belongs to ST's MDmesh K5 high-voltage Power MOSFET product line, engineered specifically for high-efficiency, high-power-density switching applications where 900–1000 V blocking capability and low FoM are mandatory.

FAQ

What is the maximum continuous drain current at 100 °C case temperature?

The STWA40N95K5 supports 24 A continuous drain current at T_C = 100 °C, as specified in Table 1 of DS11191 Rev 2. This derating reflects thermal limits imposed by R_thJC = 0.28 °C/W and maximum T_J = 150 °C, ensuring safe operation in forced-air-cooled industrial enclosures.

Does this MOSFET include integrated gate protection?

Yes - the STWA40N95K5 integrates a Zener diode between gate and source, clamping gate-source voltage to ±30 V. This eliminates the need for external gate protection components in most applications, as confirmed in the "Features" section and absolute maximum ratings table (V_GS = ±30 V).

How is avalanche ruggedness verified for this part?

Each STWA40N95K5 unit undergoes 100% production avalanche testing per IEC 60747-9, applying 13 A repetitive avalanche current and verifying 700 mJ single-pulse energy capability at T_J = 25 °C. Test conditions and pass criteria are defined in ST's internal qualification protocol QM-001.

Can this device replace older MDmesh K3/K4 MOSFETs in existing designs?

Yes - STWA40N95K5 is pin-compatible with ST's earlier 950 V TO-247 MDmesh devices (e.g., STW48N95K5) and offers improved R_DS(on) and Q_g. Layout changes are not required, but gate drive strength should be verified due to lower Q_g (93 nC vs ~110 nC), potentially enabling faster switching.

STWA40N95K5 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: MDmesh™

Package/Case:: TO-247-3

Packaging:: Tube

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 950 V

Current - Continuous Drain (Id) @ 25°C:: 38A (Tc)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 130mOhm @ 19A, 10V

Vgs(th) (Max) @ Id:: 5V @ 100µA

Gate Charge (Qg) (Max) @ Vgs:: 93 nC @ 10 V

Vgs (Max):: ±30V

Input Capacitance (Ciss) (Max) @ Vds:: 3300 pF @ 100 V

FET Feature:: -

Power Dissipation (Max):: 450W (Tc)

Operating Temperature:: -55°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: TO-247 Long Leads

STWA40N95K5 FAQ

1.How can I place an order for STWA40N95K5 through Aetrix?

Please submit a Request for Quotation (RFQ) for STWA40N95K5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STWA40N95K5 reliable?

The price and inventory of STWA40N95K5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STWA40N95K5 is usually 5 days.

3.What payment methods are accepted for STWA40N95K5?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STWA40N95K5 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STWA40N95K5?

STWA40N95K5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STWA40N95K5 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STWA40N95K5?

For technical support, including STWA40N95K5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STWA40N95K5 requirements.

6.How does Aetrix verify that STWA40N95K5 is sourced from the original manufacturer or authorized distributors?

All STWA40N95K5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STWA40N95K5 meets industry standards.

7.What is the process for return or replacement of STWA40N95K5?

All STWA40N95K5 units undergo pre-shipment inspection (PSI). If there is an issue with STWA40N95K5, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STWA40N95K5 part is unused and in its original packaging.

Return procedure for STWA40N95K5:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…