Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Discrete Semiconductor Products > Transistors > FETs, MOSFETs > FETs, MOSFETs

Toshiba Semiconductor and Storage TK9A45D(STA4,Q,M)

Name: TK9A45D(STA4,Q,M)
Brand: Toshiba Semiconductor and Storage
SKU: TK9A45D(STA4,Q,M)
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: TK9A45D(STA4,Q,M)

Manufacturer:: Toshiba Semiconductor and Storage

Category:: FETs, MOSFETs

Package:: TO-220-3 Full Pack

Datasheet:: TK9A45D(STA4,Q,M).pdf

Description:: MOSFET N-CH 450V 9A TO220SIS

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:50

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

TK9A45D(STA4,Q,M) from Toshiba is a silicon N-channel power MOSFET designed for high-voltage switching regulator applications. It features 450 V drain-source breakdown voltage (V_(BR)DSS), 9 A continuous drain current (I_D), 0.63 Ω typical R_DS(ON) at V_GS = 10 V, and 4.8 S forward transfer admittance (|Y_fs|), enabling efficient DC-DC conversion in industrial SMPS.

For engineers reviewing the TK9A45D(STA4,Q,M) datasheet, TK9A45D(STA4,Q,M) pinout, TK9A45D(STA4,Q,M) application, or TK9A45D(STA4,Q,M) equivalent, key selection criteria include avalanche ruggedness (E_AS = 170 mJ), thermal resistance (R_th(ch-c) = 3.125 °C/W), gate charge (Q_g = 16 nC), and RoHS-compliant SC-67 package compatibility with through-hole mounting.

Technical Context

This π-MOSⅦ-generation device uses planar vertical DMOS structure optimized for high-voltage hard-switching operation. Its enhancement-mode threshold (V_th = 2.0–4.0 V) ensures reliable turn-on with standard 10 V gate drive, while low Crss (4 pF) and Ciss (800 pF) support fast switching with minimal Miller effect.

The integrated body diode exhibits 1.7 V forward voltage (V_DSF) at 9 A and 1200 ns reverse recovery time (t_rr), making it suitable for freewheeling in flyback and forward converters where unidirectional conduction and controlled recovery are required.

Key Specifications

Parameter	Value and Actual Design Meaning
V_(BR)DSS	450 V - Withstands up to 450 V drain-source blocking voltage before avalanche onset, supporting 380 VAC input-derived 500 V bus designs.
R_DS(ON)	0.63 Ω (typ.) - Enables <1.3 W conduction loss at 4.5 A, critical for thermal management in compact 60–100 W SMPS.
\|Y_fs\|	4.8 S (typ.) - High transconductance improves small-signal gain and gate drive efficiency in current-mode control loops.
E_AS	170 mJ - Single-pulse avalanche energy rating allows safe operation under inductive switching stress without external snubbers.
Q_g	16 nC - Total gate charge determines required driver peak current and switching loss trade-off at 100–500 kHz frequencies.
R_th(ch-c)	3.125 °C/W - Low channel-to-case thermal resistance enables direct heatsink mounting for >30 W continuous dissipation.
t_r/t_f	20/12 ns - Fast rise/fall times reduce overlap loss during hard-switched transitions in PWM topologies.

Pinout & Package

TK9A45D(STA4,Q,M) is housed in the SC-67 (Toshiba 2-10U1B) through-hole package - a 3-pin, insulated tab metal-can variant with 1.7 g mass, JEDEC-compliant footprint, and 15.0 mm × 13.0 mm outline. The case serves as the Drain terminal and must be electrically isolated from heatsink unless referenced to system ground.

Pin/Terminal	Circuit Role	Design Meaning
1: Gate	Control electrode	Receives 10 V logic-level drive; requires ≤16 nC charge for full enhancement; ESD-sensitive (±1 μA I_GSS max).
2: Drain	High-side power terminal	Connected to switch node or bus rail; carries full load current and avalanche energy; electrically tied to metal case.
3: Source	Reference/return path	Serves as local ground reference for gate drive; carries return current and supports body diode conduction in freewheeling mode.

Key Features

Feature	Design Value
π-MOSⅦ process technology	Optimized cell layout delivering 30% lower R_DS(ON) × Q_g figure-of-merit vs. prior π-MOS VI generation.
Single-pulse avalanche rated	170 mJ energy handling at T_ch = 25°C enables robustness against transformer leakage spikes without derating.
Low Crss / Ciss ratio	Crss = 4 pF, Ciss = 800 pF → 0.5% feedback capacitance minimizes gate oscillation risk in high-dV/dt environments.
Enhancement-mode threshold	V_th = 2.0–4.0 V ensures turn-on only with active gate drive, eliminating unintended conduction during startup or fault conditions.
RoHS-compliant marking	[[G]]/RoHS COMPATIBLE label confirms lead-free terminations and compliant plating per Directive 2011/65/EU.

Applications

Industrial SMPS	AC-DC Adapters
Use Scenario: 75 W open-frame power supply for PLC I/O modules operating from 85–264 VAC input. IC Role / Device Role / Timing Role: Primary-side switching transistor in discontinuous conduction mode (DCM) flyback converter, switching at 65 kHz. Use Value: 0.63 Ω R_DS(ON) limits conduction loss to 1.3 W at full load, while 170 mJ E_AS absorbs leakage energy without snubber redesign.	Use Scenario: Compact 48 V/1.5 A wall-mount adapter for telecom edge equipment. IC Role / Device Role / Timing Role: Main switch in quasi-resonant (QR) forward converter with valley-switching control. Use Value: 4.8 S \|Y_fs\| provides stable current sensing across line/load variations, and 12 ns t_f reduces dead-time losses in synchronous rectification schemes.
Motor Drive Inverters	LED Driver Ballasts
Use Scenario: 3-phase inverter stage for 1/4 HP HVAC blower motor with regenerative braking. IC Role / Device Role / Timing Role: Upper-leg switch in half-bridge configuration, commutated at 8 kHz with 100% duty cycle capability. Use Value: Body diode V_DSF = −1.7 V at 9 A enables efficient freewheeling during PWM off-time, reducing heat sink size by 25% vs. discrete diode solutions.	Use Scenario: Constant-current LED driver for street lighting using buck-boost topology with 400 V bus. IC Role / Device Role / Timing Role: High-side switch controlling LED string current in analog-dimming enabled systems. Use Value: 450 V V_(BR)DSS accommodates 380 VAC + 20% surge margin, and 10 μA I_DSS max ensures negligible standby leakage in always-on fixtures.

Industrial SMPS

AC-DC Adapters

Use Scenario: 75 W open-frame power supply for PLC I/O modules operating from 85–264 VAC input.

IC Role / Device Role / Timing Role: Primary-side switching transistor in discontinuous conduction mode (DCM) flyback converter, switching at 65 kHz.

Use Value: 0.63 Ω R_DS(ON) limits conduction loss to 1.3 W at full load, while 170 mJ E_AS absorbs leakage energy without snubber redesign.

Use Scenario: Compact 48 V/1.5 A wall-mount adapter for telecom edge equipment.

IC Role / Device Role / Timing Role: Main switch in quasi-resonant (QR) forward converter with valley-switching control.

Use Value: 4.8 S |Y_fs| provides stable current sensing across line/load variations, and 12 ns t_f reduces dead-time losses in synchronous rectification schemes.

Motor Drive Inverters

LED Driver Ballasts

Use Scenario: 3-phase inverter stage for 1/4 HP HVAC blower motor with regenerative braking.

IC Role / Device Role / Timing Role: Upper-leg switch in half-bridge configuration, commutated at 8 kHz with 100% duty cycle capability.

Use Value: Body diode V_DSF = −1.7 V at 9 A enables efficient freewheeling during PWM off-time, reducing heat sink size by 25% vs. discrete diode solutions.

Use Scenario: Constant-current LED driver for street lighting using buck-boost topology with 400 V bus.

IC Role / Device Role / Timing Role: High-side switch controlling LED string current in analog-dimming enabled systems.

Use Value: 450 V V_(BR)DSS accommodates 380 VAC + 20% surge margin, and 10 μA I_DSS max ensures negligible standby leakage in always-on fixtures.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage N-channel MOSFET applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
STP9NK45Z	450 V, 9 A, R_DS(ON) = 0.75 Ω (typ.), Zener-protected gate, TO-220FP package	Higher R_DS(ON) increases conduction loss by ~19%; integrated gate protection simplifies ESD design	Preferred where gate robustness outweighs efficiency; not drop-in due to different thermal pad layout and pinout.
IRF840APBF	500 V, 8 A, R_DS(ON) = 0.85 Ω (typ.), TO-220AB package, no avalanche rating	Higher voltage rating but no specified E_AS; higher R_DS(ON) and lower I_D limit usable power range	Acceptable for non-avalanche-prone designs with <60 W output; requires additional clamping for leakage spikes.

Compared with STP9NK45Z and IRF840APBF, TK9A45D(STA4,Q,M) delivers superior conduction efficiency (0.63 Ω), verified single-pulse avalanche capability (170 mJ), and SC-67 package insulation-making it optimal for space-constrained, high-reliability industrial SMPS where thermal performance and ruggedness are prioritized over gate protection convenience.

Availability

TK9A45D(STA4,Q,M) is available at Aetrix Electronics and suitable for industrial SMPS, AC-DC adapters, and motor drive inverters requiring stable component supply, long-lifecycle assurance, and traceable sourcing for production ramp-up.

Supply support for TK9A45D(STA4,Q,M) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Toshiba Electronic Devices & Storage Corporation is a Japanese semiconductor manufacturer specializing in power devices, logic ICs, and memory solutions, with global manufacturing and quality certification to ISO 9001 and IATF 16949.

TK9A45D(STA4,Q,M) belongs to Toshiba's π-MOSⅦ high-voltage power MOSFET product line, engineered specifically for energy-efficient, high-reliability switching power supplies in industrial and infrastructure applications.

FAQ

What is the maximum continuous drain current rating for TK9A45D(STA4,Q,M) at 25°C case temperature?

The TK9A45D(STA4,Q,M) has a maximum continuous drain current (I_D) of 9 A at T_c = 25°C, as defined in its Absolute Maximum Ratings table. This rating assumes proper heatsinking to maintain channel temperature below 150°C. At elevated case temperatures, the current must be derated linearly per the PD–T_c curve, reaching zero at 150°C.

Does TK9A45D(STA4,Q,M) support avalanche operation, and what is its single-pulse energy rating?

Yes, TK9A45D(STA4,Q,M) is fully rated for single-pulse avalanche operation with E_AS = 170 mJ under specified test conditions (V_DD = 90 V, L = 3.5 mH, I_AR = 9 A, R_G = 25 Ω). This rating is validated per Toshiba's reliability testing and allows safe operation during inductive switching transients without external clamping in properly designed circuits.

What is the gate threshold voltage range for TK9A45D(STA4,Q,M), and how does it affect drive requirements?

The gate threshold voltage (V_th) for TK9A45D(STA4,Q,M) is specified as 2.0–4.0 V at V_DS = 10 V and I_D = 1 mA. This enhancement-mode range ensures reliable turn-on with standard 10 V gate drivers while avoiding false triggering from noise; gate drive must exceed 4.0 V to guarantee full enhancement across process and temperature variation.

Is TK9A45D(STA4,Q,M) RoHS compliant, and how is compliance indicated on the device?

Yes, TK9A45D(STA4,Q,M) is RoHS compliant, as confirmed by Toshiba's marking notation [[G]]/RoHS COMPATIBLE on the package. This indicates lead-free terminations and adherence to Directive 2011/65/EU. Full compliance documentation, including substance declarations and test reports, is available through Toshiba's official environmental portal upon request.

What package type does TK9A45D(STA4,Q,M) use, and what are its mechanical mounting considerations?

TK9A45D(STA4,Q,M) uses the SC-67 (Toshiba 2-10U1B) through-hole metal-can package. The metal case is electrically connected to Pin 2 (Drain), so electrical isolation from the heatsink is mandatory unless the drain node is at chassis ground potential. Mounting requires 2.54 mm pitch PCB holes and sufficient clearance for the 15.0 × 13.0 mm outline and 2.8 mm max height.

TK9A45D(STA4,Q,M) Specifications

Product attributes: Attribute value

Manufacturer:: Toshiba Semiconductor and Storage

Series:: π-MOSVII

Package/Case:: TO-220-3 Full Pack

Packaging:: Tube

Product Status:: Active

FET Type:: N-Channel

Technology:: MOSFET (Metal Oxide)

Drain to Source Voltage (Vdss):: 450 V

Current - Continuous Drain (Id) @ 25°C:: 9A (Ta)

Drive Voltage (Max Rds On, Min Rds On):: 10V

Rds On (Max) @ Id, Vgs:: 770mOhm @ 4.5A, 10V

Vgs(th) (Max) @ Id:: 4V @ 1mA

Gate Charge (Qg) (Max) @ Vgs:: 16 nC @ 10 V

Vgs (Max):: ±30V

Input Capacitance (Ciss) (Max) @ Vds:: 800 pF @ 25 V

FET Feature:: -

Power Dissipation (Max):: 40W (Tc)

Operating Temperature:: 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Through Hole

Supplier Device Package:: TO-220SIS

TK9A45D(STA4,Q,M) FAQ

1.How can I place an order for TK9A45D(STA4,Q,M) through Aetrix?

Please submit a Request for Quotation (RFQ) for TK9A45D(STA4,Q,M) on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TK9A45D(STA4,Q,M) reliable?

The price and inventory of TK9A45D(STA4,Q,M) are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TK9A45D(STA4,Q,M) is usually 5 days.

3.What payment methods are accepted for TK9A45D(STA4,Q,M)?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TK9A45D(STA4,Q,M) transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TK9A45D(STA4,Q,M)?

TK9A45D(STA4,Q,M) orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TK9A45D(STA4,Q,M) order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TK9A45D(STA4,Q,M)?

For technical support, including TK9A45D(STA4,Q,M) datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TK9A45D(STA4,Q,M) requirements.

6.How does Aetrix verify that TK9A45D(STA4,Q,M) is sourced from the original manufacturer or authorized distributors?

All TK9A45D(STA4,Q,M) products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TK9A45D(STA4,Q,M) meets industry standards.

7.What is the process for return or replacement of TK9A45D(STA4,Q,M)?

All TK9A45D(STA4,Q,M) units undergo pre-shipment inspection (PSI). If there is an issue with TK9A45D(STA4,Q,M), returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TK9A45D(STA4,Q,M) part is unused and in its original packaging.

Return procedure for TK9A45D(STA4,Q,M):

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…