Toshiba Semiconductor and Storage TPC8133,LQ(S
- Part No.:
- TPC8133,LQ(S
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- FETs, MOSFETs
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPC8133,LQ(S.pdf
- Description:
- MOSFET P-CH 40V 9A 8SOP
- Quantity:
- Payment:

- Shipping:

Inventory:20
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPC8133,LQ(S) from Toshiba is a silicon P-channel enhancement-mode MOSFET in SOP-8 package, rated for -40 V drain-source voltage, -9 A DC drain current, and 11 mΩ typical RDS(ON) at VGS = -10 V. It serves as a high-efficiency power management switch in lithium-ion battery protection circuits and load switching applications.
For engineers reviewing the TPC8133,LQ(S) datasheet, TPC8133,LQ(S) pinout, TPC8133,LQ(S) application, or TPC8133,LQ(S) equivalent, key selection criteria include verified RDS(ON), gate threshold voltage range (-0.8 to -2.0 V), avalanche energy rating (37 mJ), thermal resistance (65.7 °C/W on standard PCB), and SOP-8 terminal mapping for PCB layout validation.
Technical Context
This P-channel U-MOS™ device operates in enhancement mode with a negative gate threshold voltage, enabling direct logic-level control from 3.3 V or 5 V microcontrollers when used with appropriate level-shifting or gate drive configuration. Its low RDS(ON) and optimized gate charge (64 nC total) support efficient switching in high-current DC load paths.
The integrated body diode supports reverse-current conduction in battery back-up and OR-ing configurations, with a forward voltage of 1.2 V at -9 A and zero gate bias. Thermal performance is defined for two mounting conditions: 65.7 °C/W (glass-epoxy board type a) and 125 °C/W (type b), requiring layout-aware derating per Toshiba's reliability guidelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | -40 V - Maximum blocking voltage for battery-side high-side switch placement |
| RDS(ON) (typ.) | 11 mΩ at VGS = -10 V - Enables <100 mW conduction loss at 3 A load current |
| ID (DC) | -9 A - Supports continuous load switching up to 9 A with proper heatsinking |
| Vth | -0.8 to -2.0 V - Ensures reliable turn-on with standard logic-level gate drive |
| EAS | 37 mJ - Withstands single-pulse inductive energy during load dump or hot-swap events |
| Ciss | 2900 pF - Determines gate drive strength requirement for 100 ns–360 ns switching times |
| PD (Ta=25°C) | 1.9 W - Limits usable power dissipation without forced cooling on standard FR-4 |
Pinout & Package
TPC8133,LQ(S) uses the SOP-8 surface-mount package (Toshiba designation: 2-5R1S), measuring 4.9 × 6.0 × 1.75 mm with 0.085 g typical mass. The package features exposed drain pads on pins 5–8 for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source | Common return path for load current; tied to system ground or battery negative in high-side switch topology |
| 4 | Gate | Control input requiring negative VGS for turn-on; sensitive to ESD (±20 V max gate-source voltage) |
| 5, 6, 7, 8 | Drain | High-current output node connected to battery positive or supply rail; electrically and thermally coupled via exposed pad |
Key Features
| Feature | Design Value |
|---|---|
| Low RDS(ON) at logic-compatible VGS | 13.5 mΩ typ. at VGS = -4.5 V enables use with 5 V microcontroller outputs without external level shifters |
| Ultra-low leakage | IDSS ≤ -10 µA at VDS = -40 V minimizes standby current in always-on battery systems |
| Robust avalanche capability | 37 mJ single-pulse rating allows safe operation under inductive load switching without snubbers |
| Thermally optimized SOP-8 | Exposed drain terminals reduce thermal resistance by ~30% vs. standard SOP-8, improving power handling |
Applications
| Lithium-Ion Battery Protection | Power Management Switch |
|---|---|
Use Scenario: Reverse-current blocking and over-discharge protection in 2-cell to 3-cell Li-ion packs. IC Role / Device Role / Timing Role: High-side P-channel MOSFET controlling battery discharge path; activated by protection IC's gate driver output. Use Value: 11 mΩ RDS(ON) limits voltage drop to <33 mV at 3 A, preserving battery runtime and state-of-charge accuracy. | Use Scenario: Hot-swap and load switching in portable medical devices and industrial handhelds. IC Role / Device Role / Timing Role: Load switch isolating auxiliary rails (e.g., display backlight, sensor bias) from main battery. Use Value: -2.0 V maximum Vth ensures full enhancement with 3.3 V GPIO, eliminating need for dedicated gate drivers. |
| USB Power Delivery Switching | OR-ing Diode Replacement |
Use Scenario: Input power path selection between USB-C PD port and internal battery in dual-input systems. IC Role / Device Role / Timing Role: Back-to-back P-MOSFET pair (with second device) implementing bidirectional power routing. Use Value: Low Ciss (2900 pF) and fast turn-off time (360 ns) enable clean transitions during source arbitration without bus glitches. | Use Scenario: Replacing Schottky diodes in redundant power supplies to reduce forward voltage drop. IC Role / Device Role / Timing Role: Active OR-ing switch placed between two independent 12 V sources feeding common load. Use Value: 1.2 V body diode VDSF at -9 A provides lower conduction loss than typical 0.4 V Schottky only when used in synchronous rectification mode with gate control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel MOSFET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si2301DDS-T1-GE3 | RDS(ON) = 115 mΩ @ VGS = -4.5 V; SOT-23 package; 30 V rating | Lower voltage/current rating; suited for sub-2 A loads where space is critical | Select when footprint size is prioritized over conduction loss in low-power battery monitoring circuits. |
| AO3401 | RDS(ON) = 44 mΩ @ VGS = -4.5 V; SOP-8; -30 V rating; higher Qg (10 nC) | Higher RDS(ON) increases conduction loss but offers tighter Vth distribution and broader availability | Choose for cost-sensitive designs where 44 mΩ is acceptable and legacy supply chain compatibility is required. |
Compared with Si2301DDS-T1-GE3 and AO3401, the TPC8133,LQ(S) delivers superior conduction efficiency at high current due to its 11 mΩ RDS(ON) and optimized gate charge, making it preferred for >3 A battery-switching applications where thermal margin and voltage headroom are constrained.
Availability
TPC8133,LQ(S) is available at Aetrix Electronics and suitable for lithium-ion battery protection, power management switching, and OR-ing diode replacement applications requiring stable component supply across production lifecycles.
Supply support for TPC8133,LQ(S) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and logic ICs with emphasis on energy efficiency and reliability for industrial and consumer systems.
The TPC8133,LQ(S) belongs to Toshiba's U-MOS™ P-channel MOSFET product line, engineered specifically for high-efficiency, low-voltage power switching in portable and battery-powered equipment.
FAQ
What is the maximum continuous drain current rating for TPC8133,LQ(S) at 25°C ambient?
The TPC8133,LQ(S) has a DC drain current rating of -9 A at Ta = 25°C with proper PCB thermal design. This assumes mounting on a glass-epoxy board (type a) per Toshiba's test condition. Derating is required above 25°C ambient, with channel temperature limited to 150°C. At 70°C ambient, usable ID drops to approximately -5.5 A based on its 65.7 °C/W thermal resistance.
Does TPC8133,LQ(S) support logic-level gate drive from a 3.3 V microcontroller?
Yes, the TPC8133,LQ(S) has a gate threshold voltage range of -0.8 V to -2.0 V, allowing full enhancement with -3.3 V gate drive relative to source. At VGS = -4.5 V, its RDS(ON) is 13.5 mΩ (typ.), confirming robust conduction at 3.3 V–5 V logic levels without external level shifting.
What is the avalanche energy rating of TPC8133,LQ(S), and how is it tested?
The TPC8133,LQ(S) is rated for 37 mJ single-pulse avalanche energy (EAS) under test conditions of VDD = -24 V, Tch = 25°C (initial), L = 0.5 mH, RG = 25 Ω, and IAR = -9 A. This rating validates safe operation during inductive switching transients, such as motor load disconnection or relay coil de-energization, without requiring external clamping components.
How is the SOP-8 package of TPC8133,LQ(S) thermally enhanced compared to standard SOP-8?
The TPC8133,LQ(S) SOP-8 (Toshiba 2-5R1S) features an exposed drain pad across pins 5–8, which serves both electrical and thermal functions. When soldered to a copper pour, this structure reduces channel-to-ambient thermal resistance to 65.7 °C/W (vs. ~125 °C/W for non-exposed variants), enabling higher power dissipation and improved long-term reliability in compact layouts.
Is TPC8133,LQ(S) RoHS compliant, and what marking indicates compliance?
Yes, TPC8133,LQ(S) is RoHS compliant. Per Toshiba documentation, RoHS-compliant units are marked with an underlined lot number and labeled [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]]. Non-compliant versions show an unlined lot number and [[Pb]]/INCLUDES > MCV. Environmental compliance details should be confirmed with Toshiba's sales representative or official material declarations.
TPC8133,LQ(S Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- U-MOSVI
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 40 V
- Current - Continuous Drain (Id) @ 25°C:
- 9A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 4.5V, 10V
- Rds On (Max) @ Id, Vgs:
- 15mOhm @ 4.5A, 10V
- Vgs(th) (Max) @ Id:
- 2V @ 500µA
- Gate Charge (Qg) (Max) @ Vgs:
- 64 nC @ 10 V
- Vgs (Max):
- +20V, -25V
- Input Capacitance (Ciss) (Max) @ Vds:
- 2900 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 1W (Ta)
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOP
TPC8133,LQ(S FAQ
1.How can I place an order for TPC8133,LQ(S through Aetrix?
Please submit a Request for Quotation (RFQ) for TPC8133,LQ(S on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPC8133,LQ(S reliable?
The price and inventory of TPC8133,LQ(S are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPC8133,LQ(S is usually 5 days.
3.What payment methods are accepted for TPC8133,LQ(S?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPC8133,LQ(S transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPC8133,LQ(S?
TPC8133,LQ(S orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPC8133,LQ(S order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPC8133,LQ(S?
For technical support, including TPC8133,LQ(S datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPC8133,LQ(S requirements.
6.How does Aetrix verify that TPC8133,LQ(S is sourced from the original manufacturer or authorized distributors?
All TPC8133,LQ(S products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPC8133,LQ(S meets industry standards.
7.What is the process for return or replacement of TPC8133,LQ(S?
All TPC8133,LQ(S units undergo pre-shipment inspection (PSI). If there is an issue with TPC8133,LQ(S, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPC8133,LQ(S part is unused and in its original packaging.
Return procedure for TPC8133,LQ(S:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPC8133,LQ(S Tags

-
BSZ180P03NS3EGATMA1
Infineon Technologies

-
SIRA14DP-T1-GE3
Vishay Siliconix

-
AO4419
Alpha & Omega Semiconductor Inc.

-
SISA14BDN-T1-GE3
Vishay Siliconix

-
PSMN9R5-30YLC,115
Nexperia USA Inc.

-
BUK9Y21-40E,115
Nexperia USA Inc.

-
RTQ035N03HZGTR
Rohm Semiconductor

-
FDMS7680
onsemi

-
RQ3E180BNTB
Rohm Semiconductor

-
STL6N2VH5
STMicroelectronics

-
DMPH4029LFGQ-7
Diodes Incorporated

-
DMT6015LSS-13
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

