Renesas UPA1808GR-9JG-E1-A
- Part No.:
- UPA1808GR-9JG-E1-A
- Manufacturer:
- Renesas
- Category:
- FETs, MOSFETs
- Package:
- 8-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
UPA1808GR-9JG-E1-A.pdf
- Description:
- UPA1808 - N CHANNEL MOSFET
- Quantity:
- Payment:

- Shipping:

Inventory:3,000
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Product details
Overview
UPA1808GR-9JG-E1-A from Renesas Electronics (formerly NEC) is an N-channel MOSFET optimized for high-efficiency DC/DC converter switching in notebook computer power management. It features 30 V VDSS, 9.5 A continuous drain current, 17 mΩ RDS(on) at VGS = 10 V, 4.0 V logic-level gate drive capability, and integrated gate-source ESD protection diode.
For engineers reviewing the UPA1808GR-9JG-E1-A datasheet, UPA1808GR-9JG-E1-A pinout, UPA1808GR-9JG-E1-A application, or UPA1808GR-9JG-E1-A equivalent, key selection criteria include low RDS(on) at 4.0–4.5 V gate drive, pulse-rated 38 A drain current, transient thermal resistance of 62.5°C/W on ceramic substrate, and Power TSSOP8 package compatibility with space-constrained portable power stages.
Technical Context
The UPA1808GR-9JG-E1-A employs a planar vertical DMOS structure enabling direct 4.0 V microcontroller-compatible gate drive without level-shifting. Its RDS(on) remains ≤26 mΩ even at VGS = 4.0 V and ID = 5.0 A, supporting efficient synchronous rectification in buck converters.
Switching performance is defined by 13.5 ns turn-on delay, 5.6 ns rise time, 38 ns turn-off delay, and 7.9 ns fall time under VDD = 15 V, ID = 5.0 A, and RG = 10 Ω conditions. The body diode exhibits 0.84 V forward voltage at 9.5 A and 27 ns reverse recovery time, critical for freewheeling path integrity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | 30 V - Maximum blocking voltage for 12 V input rail DC/DC stages with margin |
| RDS(on) @ VGS = 4.0 V | 26 mΩ max - Enables <1 W conduction loss at 5 A in compact notebook power rails |
| ID(DC) | ±9.5 A - Continuous current rating suitable for CPU core VRM output stages |
| QG | 13 nC - Gate charge compatible with standard PWM controller drivers at ≤1 MHz |
| tr/tf | 5.6 ns / 7.9 ns - Fast edge rates minimize switching losses in high-frequency converters |
| VGS(off) | 1.5–2.5 V - Threshold ensures reliable turn-off with 3.3 V logic-level control signals |
| Ciss | 660 pF - Input capacitance supports stable gate drive with low-impedance source |
Pinout & Package
UPA1808GR-9JG-E1-A is housed in a Power TSSOP8 package (6.4 mm × 4.4 mm × 1.2 mm max), thermally enhanced with exposed drain paddle for PCB heat spreading. Pin 1–3 are Source, Pin 4 is Gate, and Pins 5–8 are Drain-connected terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 | Source | Common source node for internal MOSFET cells; connects to power ground plane |
| 4 | Gate | Control terminal requiring ≤13 nC charge for full enhancement; protected by built-in G-S diode |
| 5, 6, 7, 8 | Drain | High-current output node tied to internal drain metallization; electrically and thermally connected to exposed paddle |
Key Features
| Feature | Design Value |
|---|---|
| 4.0 V gate drive compatibility | Enables direct interface with 3.3 V/4.0 V microcontrollers and PWM controllers without external level shifters |
| Low RDS(on) at low VGS | 23 mΩ max at VGS = 4.5 V reduces conduction loss in battery-powered systems with limited headroom |
| Built-in G-S ESD protection diode | Provides Class 2 HBM ESD immunity (≥2 kV) without requiring external TVS components on gate line |
| Optimized switching speed | 13.5 ns td(on) and 38 ns td(off) support >500 kHz switching frequencies while limiting overlap loss |
| Body diode with fast recovery | 27 ns trr and 19 nC Qrr minimize reverse recovery loss in synchronous and asynchronous topologies |
Applications
| DC/DC Buck Converter Output Stage | Notebook CPU Core Voltage Regulator |
|---|---|
Use Scenario: High-current, high-efficiency step-down conversion from 12 V or 19 V adapter input to sub-2 V CPU core supply. IC Role / Device Role / Timing Role: Synchronous high-side or low-side switch in dual-MOSFET buck stage. Use Value: 26 mΩ RDS(on) at 4.0 V gate drive enables >92% efficiency at 5 A load with minimal heatsinking. |
Use Scenario: Dynamic voltage scaling (DVS) for Intel/AMD mobile processors requiring rapid load transient response. IC Role / Device Role / Timing Role: Low-side synchronous rectifier with fast body diode recovery. Use Value: 27 ns trr and 0.84 V VF(S-D) reduce shoot-through risk and freewheeling loss during light-load discontinuous conduction mode. |
| Portable Device Battery Protection Circuit | USB-C PD Power Path Switch |
Use Scenario: Reverse-current blocking and overcurrent cutoff in lithium-ion battery charging/discharging paths. IC Role / Device Role / Timing Role: Load switch with controlled turn-on/turn-off timing and integrated ESD protection. Use Value: ±20 V VGSS rating and built-in G-S diode allow robust operation in hot-swap and fault-tolerant battery interfaces. |
Use Scenario: Bidirectional 20 V power path switching in USB-C Power Delivery sink applications. IC Role / Device Role / Timing Role: Single-N-channel load switch configured with external gate driver for 5 V/9 V/15 V/20 V negotiation. Use Value: 30 V VDSS and 9.5 A ID(DC) support full USB-C PD 3.0 specification up to 100 W with margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar N-channel MOSFET switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si2308DS-T1-GE3 | RDS(on) = 28 mΩ @ VGS = 4.5 V; 20 V VDSS; SOT-23 package; lower QG (7.5 nC) | Limited to ≤12 V input rails; unsuitable for 19 V notebook adapters or USB-C PD 20 V | Select when board space is constrained and voltage stress is ≤15 V; verify thermal derating on FR-4 |
| AO3414 | RDS(on) = 22 mΩ @ VGS = 4.5 V; 20 V VDSS; SO-8 package; no integrated G-S diode | Requires external ESD protection; lower voltage rating restricts use in higher-input DC/DC designs | Prefer where cost sensitivity outweighs need for built-in ESD protection and 30 V margin |
Compared with Si2308DS-T1-GE3 and AO3414, the UPA1808GR-9JG-E1-A delivers superior 30 V blocking capability and integrated gate protection-critical for unregulated 19 V adapter inputs-while maintaining competitive RDS(on) at 4.0–4.5 V drive, making it uniquely suited for notebook and USB-C PD power stages requiring both voltage margin and logic-level compatibility.
Availability
UPA1808GR-9JG-E1-A is available at Aetrix Electronics and suitable for notebook computer power management, USB-C PD power path switching, and industrial DC/DC converter designs requiring stable component supply and long-term lifecycle continuity.
Supply support for UPA1808GR-9JG-E1-A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader delivering microcontrollers, analog, power, and SoC solutions for automotive, industrial, infrastructure, and IoT applications.
The µPA1808 series was developed by NEC (now Renesas) specifically for high-efficiency, logic-level-driven power switching in portable computing and battery-powered systems, emphasizing low RDS(on) at 4.0 V and robust thermal performance in Power TSSOP8.
FAQ
What is the maximum continuous drain current rating for UPA1808GR-9JG-E1-A?
The UPA1808GR-9JG-E1-A has a rated continuous drain current (ID(DC)) of ±9.5 A at TA = 25°C when mounted on a 5000 mm² ceramic substrate. Derating applies above 25°C ambient per the datasheet's total power dissipation curve, dropping to ~5.5 A at 75°C ambient under the same mounting condition.
Does UPA1808GR-9JG-E1-A support 3.3 V gate drive?
The UPA1808GR-9JG-E1-A is specified for 4.0 V gate drive, with RDS(on) = 26 mΩ max at VGS = 4.0 V and ID = 5.0 A. While it may partially enhance at 3.3 V, the datasheet does not guarantee performance below 4.0 V; operation at 3.3 V risks excessive RDS(on) and thermal runaway under load. Use only with ≥4.0 V gate drive.
What is the purpose of the built-in gate-source protection diode in UPA1808GR-9JG-E1-A?
The built-in gate-source diode in the UPA1808GR-9JG-E1-A provides electrostatic discharge (ESD) protection per HBM Class 2 (≥2 kV). It clamps transient gate voltage spikes but is not intended as the sole protection against overvoltage; the datasheet explicitly states that external protection is required if voltages exceeding ±20 V VGSS may occur in the system.
Can UPA1808GR-9JG-E1-A be used in synchronous rectification topologies?
Yes, the UPA1808GR-9JG-E1-A is suitable for synchronous rectification due to its low RDS(on) (17 mΩ max at VGS = 10 V), fast switching times (tr = 5.6 ns, tf = 7.9 ns), and well-characterized body diode (trr = 27 ns, Qrr = 19 nC). Its 30 V VDSS rating supports common 12 V and 19 V input buck converters.
What is the thermal resistance from channel to ambient for UPA1808GR-9JG-E1-A?
The UPA1808GR-9JG-E1-A has a transient thermal resistance (rth(ch–A)) of 62.5°C/W for single-pulse operation when mounted on a 5000 mm² × 1.1 mm ceramic substrate. On standard FR-4 (2500 mm² × 1.6 mm), rth(ch–A) rises to 125°C/W. Steady-state θJA is not specified; design must rely on transient curves and derating graphs.
UPA1808GR-9JG-E1-A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 8-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- FET Type:
- N-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 30 V
- Current - Continuous Drain (Id) @ 25°C:
- 9.5A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- 4V, 10V
- Rds On (Max) @ Id, Vgs:
- 17mOhm @ 5A, 10V
- Vgs(th) (Max) @ Id:
- 2.5V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 13 nC @ 10 V
- Vgs (Max):
- ±20V
- Input Capacitance (Ciss) (Max) @ Vds:
- 660 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- 2W (Ta)
- Operating Temperature:
- 150°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-Power TSSOP
UPA1808GR-9JG-E1-A FAQ
1.How can I place an order for UPA1808GR-9JG-E1-A through Aetrix?
Please submit a Request for Quotation (RFQ) for UPA1808GR-9JG-E1-A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UPA1808GR-9JG-E1-A reliable?
The price and inventory of UPA1808GR-9JG-E1-A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UPA1808GR-9JG-E1-A is usually 5 days.
3.What payment methods are accepted for UPA1808GR-9JG-E1-A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UPA1808GR-9JG-E1-A transactions.
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4.How is shipping managed for UPA1808GR-9JG-E1-A?
UPA1808GR-9JG-E1-A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UPA1808GR-9JG-E1-A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UPA1808GR-9JG-E1-A?
For technical support, including UPA1808GR-9JG-E1-A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UPA1808GR-9JG-E1-A requirements.
6.How does Aetrix verify that UPA1808GR-9JG-E1-A is sourced from the original manufacturer or authorized distributors?
All UPA1808GR-9JG-E1-A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UPA1808GR-9JG-E1-A meets industry standards.
7.What is the process for return or replacement of UPA1808GR-9JG-E1-A?
All UPA1808GR-9JG-E1-A units undergo pre-shipment inspection (PSI). If there is an issue with UPA1808GR-9JG-E1-A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UPA1808GR-9JG-E1-A part is unused and in its original packaging.
Return procedure for UPA1808GR-9JG-E1-A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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