Renesas UPA1917TE-T1-AT
- Part No.:
- UPA1917TE-T1-AT
- Manufacturer:
- Renesas
- Category:
- FETs, MOSFETs
- Package:
- SC-95-6
- Datasheet:
-
UPA1917TE-T1-AT.pdf
- Description:
- MOSFET P-CH 20V SC-95
- Quantity:
- Payment:

- Shipping:

Inventory:7,990
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Product details
Overview
UPA1917TE-T1-AT from Renesas Electronics is a P-channel enhancement-mode MOSFET designed for low-voltage switching applications in portable electronics. It supports direct 1.8 V gate drive, delivers ≤53 mΩ RDS(on) at VGS = –4.5 V / ID = –3.0 A, and features integrated gate-source ESD protection diode. It is used as a load switch in battery-powered devices such as smartphones and wearables.
For engineers reviewing the UPA1917TE-T1-AT datasheet, UPA1917TE-T1-AT pinout, UPA1917TE-T1-AT application, or UPA1917TE-T1-AT equivalent, key selection criteria include 1.8 V logic compatibility, low RDS(on) at sub-2.5 V drive, SC-95 package thermal performance, and body diode conduction capability in reverse-biased configurations.
Technical Context
This device operates as a single P-channel power switch with depletion-free enhancement-mode behavior. Its gate threshold voltage range (–0.45 V to –1.5 V) enables reliable turn-on under 1.8 V supply while maintaining low leakage (IDSS ≤ –10 µA at VDS = –20 V). The integrated gate-source protection diode is explicitly designated for ESD handling-not for functional circuit operation.
Switching performance is characterized with 16 ns turn-on delay, 64 ns rise time, and 78 ns turn-off delay under VDD = –10 V, ID = –3.0 A, and RG = 10 Ω. Total gate charge is 8.1 nC, with QGD = 2.8 nC confirming moderate Miller effect-critical for PWM-controlled load switching stability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDSS | –20 V maximum drain-source blocking voltage - defines safe operating ceiling for battery-input circuits up to 2-cell Li-ion (≤8.4 V) with margin. |
| RDS(on)1 | 53 mΩ max at VGS = –4.5 V / ID = –3.0 A - enables <160 mW conduction loss at 3 A, suitable for high-efficiency power path control. |
| RDS(on)3 | 107 mΩ max at VGS = –1.8 V / ID = –1.5 A - guarantees functional switching under lowest-core logic supply, critical for ultra-low-power sleep-mode control. |
| ID(DC) | –6.0 A maximum continuous drain current - sets thermal design limit when mounted on FR-4 (2.0 W dissipation). |
| Ciss | 835 pF typical input capacitance - determines required gate driver strength and impacts switching speed under fixed RG. |
| VGS(off) | –0.45 to –1.5 V gate threshold range - ensures robust turn-on with 1.8 V logic while minimizing risk of unintended conduction from noise. |
| QG | 8.1 nC total gate charge - quantifies energy needed per switching cycle; informs driver sizing and dynamic loss calculation. |
Pinout & Package
UPA1917TE-T1-AT is housed in SC-95 (Mini Mold Thin Type) package - 1.9 mm × 2.9 mm × 0.65 mm, surface-mount, thermally enhanced for compact portable PCBs. Drain terminals are exposed on four sides (pins 1, 2, 5, 6) for low-inductance current paths and improved heat spreading.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 5, 6 | Drain | Common high-side switching node; electrically and thermally tied to exposed drain paddle - must be connected to ground plane or power rail for thermal management and EMI control. |
| 3 | Gate | Control input; requires clean 1.8–4.5 V negative swing relative to source; protected by internal Zener but needs external RC filtering for noisy environments. |
| 4 | Source | Reference node for gate drive and load return path; connects to system VBAT or intermediate rail - defines switching polarity and body diode orientation. |
Key Features
| Feature | Design Value |
|---|---|
| 1.8 V logic-compatible gate drive | Enables direct interface with modern ultra-low-voltage microcontrollers and PMICs without level-shifting circuitry. |
| Low RDS(on) at VGS = –1.8 V | 107 mΩ max ensures usable on-resistance even under minimum core supply, supporting always-on subsystems. |
| Integrated gate-source ESD diode | Provides Class 2 HBM ESD protection (per datasheet note); eliminates need for discrete gate clamp in most handheld designs. |
| SC-95 thin-profile package | 0.65 mm height allows stacking under displays or batteries; 4-sided drain reduces trace inductance in high-dI/dt load-switch paths. |
| Body diode forward voltage | VF(S-D) = 0.94 V at 6.0 A - enables bidirectional current handling in back-to-back configurations or reverse-polarity protection schemes. |
Applications
| Battery Load Switch | USB Port Power Control |
|---|---|
Use Scenario: Managing power delivery from single-cell Li-ion battery to RF module during sleep/wake cycles in Bluetooth earbuds. IC Role / Device Role / Timing Role: High-side P-channel switch controlling VBAT connection to downstream LDO; activated by baseband processor GPIO. Use Value: 107 mΩ RDS(on) at 1.8 V drive minimizes quiescent loss during multi-day standby, extending battery life without adding gate driver IC. |
Use Scenario: Enabling/disabling 5 V USB power to peripheral accessories in portable media players with OTG support. IC Role / Device Role / Timing Role: Reverse-polarity protected high-side switch placed between USB VBUS and accessory port; controlled via USB controller interrupt line. Use Value: Integrated body diode and –20 V VDSS rating tolerate hot-plug transients and accidental reverse connection, eliminating need for external Schottky clamp. |
| Smartphone Backlight Dimming | Industrial Sensor Node Power Gating |
Use Scenario: PWM-controlled current path for white LED strings in OLED display bezel lighting, driven by 1.8 V MCU timer output. IC Role / Device Role / Timing Role: Low-side switch (source grounded) modulating LED current; gate driven by inverted PWM signal to maintain common-cathode topology. Use Value: 64 ns rise time and 8.1 nC QG support >100 kHz dimming without significant switching loss, preserving efficiency at 30% duty cycle. |
Use Scenario: Isolating power to MEMS pressure sensor and ADC during deep-sleep intervals in wireless environmental monitors. IC Role / Device Role / Timing Role: Always-off high-side disconnect switch; turned on only during 100 ms measurement bursts to minimize average current draw. Use Value: –10 µA IDSS leakage at –20 V ensures <1 µA system standby current, meeting 5-year battery life target for sealed IoT deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar P-channel MOSFET switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si2301DDS-T1-GE3 | RDS(on) = 115 mΩ @ VGS = –1.8 V (vs. 107 mΩ); same SC-70 package but lower thermal mass. | Higher conduction loss at ultra-low drive; less suitable for 1.8 V–only systems requiring <100 mΩ. | Select if footprint compatibility with legacy Si2301-based designs is mandatory and 1.8 V drive margin is sufficient. |
| AP2301GN | RDS(on) = 90 mΩ @ VGS = –1.8 V; SOT-23 package with higher RθJA (250°C/W vs. 200°C/W for SC-95). | Lower on-resistance but reduced thermal capability limits sustained 3 A operation without copper pour. | Select when board space is constrained to SOT-23 and peak current is <2 A with intermittent duty cycle. |
Compared with Si2301DDS-T1-GE3 and AP2301GN, UPA1917TE-T1-AT uniquely balances 1.8 V drive capability, 107 mΩ on-resistance, and SC-95 thermal performance - making it optimal for compact, battery-constrained designs requiring reliable high-current switching without gate drivers.
Availability
UPA1917TE-T1-AT is available at Aetrix Electronics and suitable for portable consumer electronics, USB power delivery subsystems, and industrial sensor node power management requiring stable component supply across multi-year production cycles.
Supply support for UPA1917TE-T1-AT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics Corporation is a global semiconductor leader specializing in microcontrollers, analog, power, and connectivity solutions for automotive, industrial, and enterprise applications.
The UPA1917TE-T1-AT belongs to Renesas' legacy µPA series of low-voltage power MOSFETs, engineered specifically for energy-efficient switching in space-constrained portable electronics where 1.8 V logic compatibility and minimal bill-of-materials are critical.
FAQ
What is the maximum continuous drain current rating for UPA1917TE-T1-AT?
The UPA1917TE-T1-AT has a maximum continuous drain current (ID(DC)) of –6.0 A at TA = 25°C when mounted on an FR-4 board (50 mm × 50 mm × 1.6 mm). Derating applies above 25°C ambient; at 75°C, usable current drops to approximately –3.5 A based on the published derating curve in the datasheet.
Can UPA1917TE-T1-AT be driven directly by a 1.8 V GPIO without a level shifter?
Yes - the UPA1917TE-T1-AT is explicitly specified for 1.8 V drive capability, with RDS(on)3 = 107 mΩ MAX at VGS = –1.8 V and ID = –1.5 A. Its gate threshold voltage range (–0.45 V to –1.5 V) ensures reliable turn-on under 1.8 V logic swing, eliminating need for external level translation circuitry.
What is the role of the internal diode between gate and source in UPA1917TE-T1-AT?
The internal diode between gate and source in UPA1917TE-T1-AT serves solely as an ESD protection element (per datasheet Remark), not as a functional circuit component. It clamps transient voltages during handling but does not participate in normal switching operation - external overvoltage protection remains necessary for system-level reliability.
Is UPA1917TE-T1-AT suitable for reverse-polarity protection circuits?
Yes - the UPA1917TE-T1-AT's P-channel configuration and –20 V VDSS rating make it well-suited for high-side reverse-polarity protection. When placed between input and load with source tied to input, its body diode blocks reverse current while the channel conducts forward current, and its 0.94 V VF(S-D) ensures low-loss fault-path conduction.
What package type does UPA1917TE-T1-AT use, and how many pins are electrically active?
UPA1917TE-T1-AT uses the SC-95 (Mini Mold Thin Type) package - a 6-pin surface-mount outline measuring 1.9 mm × 2.9 mm × 0.65 mm. Pins 1, 2, 5, and 6 are internally connected to the drain, pin 3 is the gate, and pin 4 is the source - resulting in three distinct electrical terminals despite six physical leads.
UPA1917TE-T1-AT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- SC-95-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- FET Type:
- P-Channel
- Technology:
- MOSFET (Metal Oxide)
- Drain to Source Voltage (Vdss):
- 20 V
- Current - Continuous Drain (Id) @ 25°C:
- 6A (Ta)
- Drive Voltage (Max Rds On, Min Rds On):
- -
- Rds On (Max) @ Id, Vgs:
- 53mOhm @ 3A, 4.5V
- Vgs(th) (Max) @ Id:
- 1.5V @ 1mA
- Gate Charge (Qg) (Max) @ Vgs:
- 8.1 nC @ 4 V
- Vgs (Max):
- -
- Input Capacitance (Ciss) (Max) @ Vds:
- 835 pF @ 10 V
- FET Feature:
- -
- Power Dissipation (Max):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-95-6, Mini Mold Thin
UPA1917TE-T1-AT FAQ
1.How can I place an order for UPA1917TE-T1-AT through Aetrix?
Please submit a Request for Quotation (RFQ) for UPA1917TE-T1-AT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UPA1917TE-T1-AT reliable?
The price and inventory of UPA1917TE-T1-AT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UPA1917TE-T1-AT is usually 5 days.
3.What payment methods are accepted for UPA1917TE-T1-AT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UPA1917TE-T1-AT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UPA1917TE-T1-AT?
UPA1917TE-T1-AT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UPA1917TE-T1-AT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UPA1917TE-T1-AT?
For technical support, including UPA1917TE-T1-AT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UPA1917TE-T1-AT requirements.
6.How does Aetrix verify that UPA1917TE-T1-AT is sourced from the original manufacturer or authorized distributors?
All UPA1917TE-T1-AT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UPA1917TE-T1-AT meets industry standards.
7.What is the process for return or replacement of UPA1917TE-T1-AT?
All UPA1917TE-T1-AT units undergo pre-shipment inspection (PSI). If there is an issue with UPA1917TE-T1-AT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UPA1917TE-T1-AT part is unused and in its original packaging.
Return procedure for UPA1917TE-T1-AT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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