Diodes Incorporated ZVNL110ASTOA

Overview

ZVNL110ASTOA from Zetex Semiconductors (now Diodes Incorporated) is an N-channel enhancement-mode vertical DMOS FET in TO-92 package, rated for 100 V V_DS, 320 mA continuous drain current, and 3.0 Ω R_DS(on) at V_GS = 10 V. It operates with low threshold voltage (0.75–1.5 V), enabling direct drive from 3.3 V or 5 V logic in low-power switching applications such as LED control and sensor interface circuits.

For engineers reviewing the ZVNL110ASTOA datasheet, ZVNL110ASTOA pinout, ZVNL110ASTOA application, or ZVNL110ASTOA equivalent, key selection criteria include verified R_DS(on) at 5 V gate drive, guaranteed 100 V breakdown margin, TO-92 thermal derating behavior, and documented turn-on/turn-off timing under 25 V resistive load conditions.

Technical Context

This discrete MOSFET uses vertical DMOS construction to achieve high voltage capability with low on-resistance in a through-hole TO-92 package. Its enhancement-mode operation requires positive gate bias for conduction, and its low V_GS(th) range ensures reliable turn-on with standard logic-level signals.

Electrical characterization confirms stable performance across temperature: IDSS remains ≤500 µA at 80 V and 125°C, while g_fs of 225 mS supports fast switching transitions. C_iss, C_oss, and C_rss values (75 pF / 25 pF / 8 pF) indicate suitability for moderate-frequency (<1 MHz) switching where capacitive charge management is critical.

Key Specifications

Pinout & Package

Package: TO-92 (E-Line compatible), through-hole, epoxy-molded plastic case with standard D-G-S terminal assignment when viewed from flat side with leads down.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-voltage, low-current switching applications.

Compared with ZVN2110A and DMN2004LK-7, ZVNL110ASTOA uniquely balances 100 V capability, sub-1.5 V threshold, and TO-92 through-hole compatibility-making it optimal for legacy-compatible, medium-voltage, logic-driven switching where thermal mass and manual assembly matter.

Availability

ZVNL110ASTOA is available at Aetrix Electronics and suitable for LED driver circuits, sensor power gating, microcontroller I/O expansion, and low-power relay control requiring stable component supply and long-term manufacturability.

Supply support for ZVNL110ASTOA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Zetex Semiconductors, acquired by Diodes Incorporated in 2008, specialized in high-performance discrete semiconductors for precision analog and power management applications.

ZVNL110ASTOA belongs to Zetex's logic-level N-channel MOSFET product line, designed specifically for direct-drive switching in space- and cost-constrained industrial and instrumentation systems where TO-92 mounting and 3.3 V compatibility are essential.

FAQ

What is the maximum safe gate-source voltage for ZVNL110ASTOA?

The absolute maximum V_GS is ±20 V. Exceeding this risks irreversible gate oxide damage. In practice, gate drive should be limited to 10–12 V for robustness, especially in noisy industrial environments. A 10 kΩ series resistor is recommended to limit transient current during hot-plug or ESD events.

Can ZVNL110ASTOA be used in linear (analog) mode for current regulation?

Yes, but with strict thermal constraints: its 700 mW P_tot and high θ_JA (~180°C/W) limit usable linear power to <150 mW at room temperature. For stable current source applications, forced-air cooling or PCB copper pour is mandatory; operation above 85°C ambient requires derating below 200 mW.

Does ZVNL110ASTOA have built-in ESD protection?

No. The device has no integrated ESD protection diodes. Gate-source leakage (I_GSS) is specified at 100 nA max at ±20 V, confirming absence of shunt clamps. External gate protection-such as a 5.1 V Zener or bidirectional TVS-is required in systems exposed to handling or system-level ESD per IEC 61000-4-2.

How does temperature affect R_DS(on) in ZVNL110ASTOA?

R_DS(on) increases with junction temperature, typically +0.5%/°C. At 125°C, R_DS(on) rises to ~4.1 Ω (vs. 3.0 Ω at 25°C), increasing conduction loss by ~35%. Designers must include thermal margin in power dissipation calculations and verify worst-case voltage drop across the FET at max operating temperature.