Asahi Kasei Microdevices/AKM AP1012A
- Part No.:
- AP1012A
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
AP1012A.pdf
- Description:
- IC HALF BRIDGE DRIVER 1.3A 24QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AP1012A from Asahi Kasei Microdevices is a dual H-bridge motor driver IC with N-channel LDMOS high-side and low-side output stages, 18 V motor supply capability, 1.3 A continuous output current, and integrated under-voltage detection (2.2 V typ) and thermal shutdown (175 °C typ). It drives small DC motors in robotics, portable medical pumps, and compact actuator modules requiring bidirectional control and brake/standby modes.
For engineers reviewing the AP1012A datasheet, AP1012A pinout, AP1012A application, or AP1012A equivalent, this page delivers verified technical context including charge-pump-based high-side drive architecture, QFN-24 package layout, dual-motor control logic states, and real-world protection behavior under overtemperature and undervoltage conditions.
Technical Context
The AP1012A implements a dual independent H-bridge topology using N-channel LDMOS FETs on both high-side and low-side outputs, enabled by an internal 360 kHz charge pump generating VG = VM + VC. Its control logic accepts four discrete input pairs (IN1A/IN1B, IN2A/IN2B) to select forward, reverse, brake, or standby for each bridge.
Protection is hardware-automated: under-voltage lockout disables operation below 2.2 V (typ) on VC, while thermal shutdown forces Hi-Z on all outputs at 175 °C (typ) with 30 °C hysteresis. Penetration current prevention enforces dead-time during switching transitions to avoid shoot-through.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Motor Supply Voltage | 2–18 V DC - supports standard Li-ion, NiMH, and 12 V rail systems without external regulation |
| Continuous Output Current | 1.3 A per channel - enables driving 5–10 W brushed DC motors with sustained torque |
| Peak Output Current | 4.5 A (≤2.5 ms in 200 ms) - handles short-duration stall or acceleration surges |
| H-Bridge On Resistance | 0.36 Ω (TOP+BPT, typ @25°C) - limits conduction loss to ≤0.65 W per bridge at 1.3 A |
| Control Supply Range | 2.7–5.5 V - compatible with 3.3 V or 5 V MCU I/O without level-shifting |
| Logic Supply Range | 1.62 V to VC - allows mixed-voltage interface with low-power microcontrollers |
| Thermal Shutdown Threshold | 175 °C (typ) - protects die integrity during overload or poor heatsinking |
| UVLO Threshold | 2.2 V (typ) on VC - prevents erratic operation during brown-out or battery sag |
Pinout & Package
AP1012A is housed in a thermally enhanced 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed power ground pad (EP) for PCB-level heat dissipation. The package complies with JEDEC MO-220 and supports reflow soldering per J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1A, IN1B, IN2A, IN2B | Control signal inputs | Digital logic inputs defining direction/brake/standby state for each H-bridge; 100 kΩ internal pull-up on EN/PSAVE only |
| VM1, VM2 | Motor power supply inputs | Separate pins for dual bridges - must be tied to same voltage externally; not internally connected |
| OUT1A, OUT1B, OUT2A, OUT2B | Motor output terminals | Full H-bridge outputs capable of sourcing/sinking up to 1.3 A DC; body diodes support freewheeling |
| VG, CH, CL | Charge pump interface | VG is pumped output (VC + VM); CH/CL connect external 0.1 µF ceramic capacitors to stabilize charge pump operation |
| VIO, VC, DGND, PGND | Power and ground rails | VIO powers logic interface; VC powers internal control circuitry; DGND/PGND must be joined at EP for noise isolation |
| EN, PSAVE | Enable and power-save controls | EN enables/disables both bridges; PSAVE shuts down charge pump, OSC, TSD, and UVLO to reduce VC current to ≤1 µA |
Key Features
| Feature | Design Value |
|---|---|
| N-channel LDMOS dual H-bridge | Enables compact 4 mm × 4 mm QFN package while delivering 18 V motor drive capability without external high-side drivers |
| Integrated charge pump | Generates VG = VM + VC internally at 360 kHz, eliminating need for external bootstrap components or gate drivers |
| Hardware penetration current prevention | Automatically inserts dead time between high-side and low-side FET switching to prevent shoot-through without MCU intervention |
| Low quiescent consumption | VM supply current <2 µA in no-power state and <70 µA in standby - extends battery life in always-on portable systems |
| Thermal and UVLO protection | Self-resetting shutdown at 175 °C (30 °C hysteresis) and VC undervoltage lockout at 2.2 V (typ) ensure robust field operation |
Applications
| Medical Infusion Pumps | Robotic Joint Actuators |
|---|---|
Use Scenario: Precise bidirectional control of peristaltic or syringe pump motors in battery-powered infusion devices. IC Role / Device Role / Timing Role: Dual H-bridge driver executing microstep-equivalent motion profiles via PWM-controlled forward/reverse/brake sequencing. Use Value: Integrated UVLO prevents dose errors during battery voltage sag; thermal shutdown avoids motor overheating in enclosed housings. | Use Scenario: Compact servo actuation in multi-axis educational or collaborative robots with space-constrained joints. IC Role / Device Role / Timing Role: Motor driver executing position-hold (brake), directional rotation (forward/reverse), and safe stop (brake) commands from MCU GPIOs. Use Value: 1.3 A continuous current supports 100–200 mNm torque motors; QFN-24 footprint minimizes PCB area vs. discrete MOSFET solutions. |
| Portable Diagnostic Scanners | Smart Home Window Actuators |
Use Scenario: Driving linear stepper-like motion in handheld ultrasound or dermatology scanners requiring quiet, low-EMI motor control. IC Role / Device Role / Timing Role: H-bridge providing controlled acceleration/deceleration via timed INx input transitions and PWM duty modulation. Use Value: Charge-pump architecture eliminates bootstrap diode noise; low 0.36 Ω RON reduces heat generation during extended scan cycles. | Use Scenario: Bidirectional control of tubular motors in motorized blinds or vent actuators powered from 12 V wall adapters or PoE-derived rails. IC Role / Device Role / Timing Role: Dual-bridge driver managing main drive and position-sensing auxiliary motor in self-calibrating window systems. Use Value: 18 V rating accommodates 12 V nominal with surge margin; PSAVE mode cuts standby current to <1 µA for energy certification compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual H-bridge motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TB6612FNG | Lower max VM (15 V), higher RON (0.56 Ω typ), no integrated charge pump - requires external bootstrap or high-side driver | Lacks built-in UVLO and thermal shutdown; relies on external monitoring circuits | Preferred when cost sensitivity outweighs integration benefits and 15 V motor supply suffices |
| DRV8876N | Higher peak current (6.8 A), integrated current sense, SPI interface - larger 20-pin HTSSOP package | Includes fault reporting and programmable current limiting; targets industrial-grade feedback control loops | Chosen when closed-loop current monitoring or higher surge tolerance is required |
Compared with TB6612FNG and DRV8876N, the AP1012A offers superior integration density (QFN-24), autonomous charge-pump operation, and tighter thermal/UVLO thresholds - making it optimal for space-constrained, battery-operated dual-motor systems where minimal external components and deterministic protection are critical.
Availability
AP1012A is available at Aetrix Electronics and suitable for medical infusion pumps, robotic joint actuators, portable diagnostic scanners, and smart home window actuators requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for AP1012A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Asahi Kasei Microdevices (AKM) is a Japanese semiconductor company specializing in analog, mixed-signal, and sensor ICs, with core expertise in motor control, audio, and magnetic sensing technologies.
The AP1012A belongs to AKM's high-efficiency motor driver product line, designed specifically for compact, low-noise, dual-motor applications in portable medical, robotics, and consumer automation systems.
FAQ
What is the maximum motor supply voltage supported by the AP1012A?
The AP1012A supports a motor supply voltage range of 2 V to 18 V DC, with absolute maximum rating at 19 V. This allows direct interfacing with common 12 V battery systems and single-cell to four-cell Li-ion packs while maintaining safe operating margins. Operation above 18 V is not recommended and may trigger overvoltage stress on internal LDMOS structures.
How does the AP1012A achieve high-side drive without external components?
The AP1012A integrates a 360 kHz charge pump that generates VG = VM + VC internally, enabling full N-channel LDMOS high-side FET operation without external bootstrap diodes or capacitors. This eliminates layout complexity and EMI sources associated with discrete high-side drivers, and ensures reliable turn-on even at low VC voltages down to 2.7 V.
Does the AP1012A require external current-sense resistors for overcurrent protection?
No, the AP1012A does not include internal current sensing or require external sense resistors for its primary protection functions. Overcurrent handling relies on thermal shutdown (175 °C typ) and inherent RON-limited conduction. Peak current capability (4.5 A for ≤2.5 ms) is defined by SOA, not sensed - design must ensure external motor and PCB traces remain within safe operating area under transient loads.
Can the AP1012A drive two independent motors simultaneously?
Yes, the AP1012A contains two fully independent H-bridges (Bridge 1: IN1A/IN1B → OUT1A/OUT1B; Bridge 2: IN2A/IN2B → OUT2A/OUT2B), each supporting forward, reverse, brake, and standby modes. Both bridges share VM1/VM2 supplies but operate with separate control inputs and outputs, enabling true simultaneous bidirectional control of two DC motors without cross-talk or timing constraints.
What is the purpose of the PSAVE pin on the AP1012A?
The PSAVE pin places the AP1012A into ultra-low-power mode by disabling the charge pump, oscillator, thermal shutdown, and under-voltage detection circuits. When PSAVE = HIGH, VC supply current drops to ≤1 µA (typ), while maintaining digital input readiness. This mode is ideal for battery-powered systems requiring extended sleep periods without full system reset or external power gating.
AP1012A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Asahi Kasei Microdevices/AKM
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Half Bridge (4)
- Applications:
- General Purpose
- Interface:
- Logic
- Load Type:
- Inductive
- Technology:
- Power MOSFET
- Rds On (Typ):
- 180mOhm LS, 180mOhm HS
- Current - Output / Channel:
- 1.3A
- Current - Peak Output:
- 3A
- Voltage - Supply:
- 2.7V ~ 5.5V
- Voltage - Load:
- 2V ~ 18V
- Operating Temperature:
- -30°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Fault Protection:
- Over Temperature, UVLO
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
AP1012A FAQ
1.How can I place an order for AP1012A through Aetrix?
Please submit a Request for Quotation (RFQ) for AP1012A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AP1012A reliable?
The price and inventory of AP1012A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AP1012A is usually 5 days.
3.What payment methods are accepted for AP1012A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AP1012A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AP1012A?
AP1012A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AP1012A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AP1012A?
For technical support, including AP1012A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AP1012A requirements.
6.How does Aetrix verify that AP1012A is sourced from the original manufacturer or authorized distributors?
All AP1012A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AP1012A meets industry standards.
7.What is the process for return or replacement of AP1012A?
All AP1012A units undergo pre-shipment inspection (PSI). If there is an issue with AP1012A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AP1012A part is unused and in its original packaging.
Return procedure for AP1012A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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