Texas Instruments CSD95373BQ5MT
- Part No.:
- CSD95373BQ5MT
- Manufacturer:
- Texas Instruments
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- 12-PowerLFDFN
- Datasheet:
-
CSD95373BQ5MT.pdf
- Description:
- IC HALF BRIDGE DRIVER 45A 12LSON
- Quantity:
- Payment:

- Shipping:

Inventory:750
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Product details
Overview
CSD95373BQ5MT from Texas Instruments is a synchronous buck NexFET™ Smart Power Stage integrating driver IC and dual power MOSFETs in a single LSON-CLIP (DQP) package. It delivers 45-A continuous output current, achieves 92.7% system efficiency at 25 A, and supports up to 1.25 MHz switching frequency with diode emulation mode and temperature-compensated bidirectional current sensing - deployed in high-density VR12.x multiphase CPU core power stages.
For engineers reviewing the CSD95373BQ5MT datasheet, CSD95373BQ5MT pinout, CSD95373BQ5MT application, or CSD95373BQ5MT equivalent, key selection criteria include its 5-mm × 6-mm ultra-low-inductance footprint, integrated bootstrap diode, tri-state PWM compatibility (3.3 V/5 V), and fault monitoring for high-side short, overcurrent, and overtemperature events.
Technical Context
The CSD95373BQ5MT implements a high-frequency synchronous buck power stage with integrated gate driver, high-side and low-side NexFET™ MOSFETs, and analog sensing circuitry. It operates with externally supplied PWM signals and supports both forced continuous conduction mode (FCCM) and diode emulation via dedicated FCCM pin control.
Its internal current sense amplifier outputs voltage proportional to phase current (IOUT–REFIN), while TAO/FAULT provides analog temperature output (600 mV at 0°C) with OR-ing capability in multiphase configurations. Thermal shutdown protection pulls TAO to 3.3 V upon junction exceedance of 150°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Continuous Output Current | 45 A at VIN = 12 V, VOUT = 1.2 V, fSW = 500 kHz, LOUT = 0.225 µH - defines maximum sustained load capability without thermal derating. |
| Peak Output Current | 67 A for tp = 50 µs - supports transient load demands in CPU/GPU VR applications. |
| Switching Frequency | Up to 1250 kHz - enables compact magnetics and fast transient response in high-density POL designs. |
| System Efficiency | 92.7% at 25 A - measured at VIN = 12 V, VOUT = 1.2 V, fSW = 500 kHz, TA = 25°C. |
| Power Loss | 2.6 W at 25 A - directly impacts thermal design margin and heatsink requirements. |
| Junction Temperature Range | –55°C to +150°C - specifies operational reliability envelope under full load and ambient extremes. |
| PWM Input Compatibility | 3.3-V and 5-V logic levels - ensures interoperability with common controller ICs including TPS53661. |
Pinout & Package
Package: LSON-CLIP (DQP), 12-pin, 5.00 mm × 6.00 mm outline with exposed thermal pad. Ultra-low-inductance construction minimizes switching losses and EMI.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IOUT | Current sense amplifier output | Voltage proportional to phase current (IOUT – REFIN); used for closed-loop current monitoring and OCP. |
| REFIN | Current sense reference input | External reference point for current sense amplifier; sets zero-current baseline. |
| VDD | Gate driver supply | 4.5–5.5 V supply for internal driver and logic; powers high-side bootstrap circuitry. |
| ENABLE | Global enable control | Logic HIGH enables operation; internal 100-kΩ pulldown ensures safe default OFF state. |
| PGND (pins 4 & 13) | Power ground return | Dual PGND pins reduce ground loop inductance and improve current sensing accuracy. |
| VSW | Switch node | Connection between HS source and LS drain; ties directly to output inductor; critical for layout EMI control. |
| PWM | Tri-state PWM input | Controls FET states: LOW → HS off / LS on; HIGH → HS on / LS off; Hi-Z → both off after hold-off time. |
| FCCM | Mode selection | LOW enables diode emulation; HIGH forces continuous conduction; internal 5-µA pull-up to 3.3 V. |
| BOOT / BOOT_R | Bootstrap circuit | BOOT connects to external 0.1-µF capacitor; BOOT_R returns to VSW internally - integrated bootstrap diode eliminates external component. |
| TAO/FAULT | Temperature analog output / fault indicator | Analog voltage (600 mV @ 0°C) with OR-ing capability; pulled to 3.3 V during thermal shutdown. |
| VIN | Main input supply | Input voltage rail (up to 16 V); requires local ceramic decoupling per datasheet layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated NexFET™ MOSFETs + driver | Eliminates discrete gate driver layout complexity and reduces BOM count in multiphase VR designs. |
| Temperature-compensated bidirectional current sense | Enables accurate phase current reporting across –40°C to +125°C ambient without external calibration. |
| Diode emulation with FCCM control | Improves light-load efficiency by disabling LS FET during dead time; selectable via dedicated pin. |
| Optimized dead time for shoot-through protection | Prevents simultaneous HS/LS conduction without requiring external timing adjustment or controller support. |
| System-optimized PCB footprint | Minimizes trace inductance and thermal resistance; validated with TI's VR12.x reference layouts. |
Applications
| Server CPU Core VR | GPU Memory VR |
|---|---|
Use Scenario: High-current, fast-transient power delivery to Intel/AMD server CPUs compliant with VR12.x specifications. IC Role / Device Role / Timing Role: Synchronous buck power stage in 4+ phase interleaved topology; receives PWM commands from TPS53661 controller. Use Value: Delivers 45-A continuous current with 92.7% efficiency at 25 A, reducing board-level heat generation and enabling higher power density. | Use Scenario: Point-of-load regulation for GDDR6 memory subsystems in AI accelerators and high-end graphics cards. IC Role / Device Role / Timing Role: Single-phase VR stage operating at 1.2 MHz to minimize inductor size while maintaining tight voltage regulation under dynamic GPU workloads. Use Value: Supports peak currents up to 67 A for <50 µs transients, ensuring stable memory voltage during burst compute operations. |
| Desktop VR11.x Motherboard | High-Density POL Module |
Use Scenario: Dual-phase CPU core regulator on ATX desktop motherboards targeting VR11.x compliance and energy efficiency certification. IC Role / Device Role / Timing Role: Smart power stage receiving tri-state PWM inputs; uses FCCM pin to switch between FCCM and diode emulation based on load conditions. Use Value: Achieves >90% efficiency across 1–45 A load range, improving platform-level 80 PLUS Titanium performance metrics. | Use Scenario: Compact, high-efficiency DC-DC module for FPGA I/O banks or ASIC auxiliary rails in telecom infrastructure equipment. IC Role / Device Role / Timing Role: Standalone buck stage with integrated current/temperature sensing, simplifying feedback loop design and eliminating external sense resistors. Use Value: Reduces total solution footprint by 35% versus discrete driver + MOSFET implementation while maintaining ±1.5% output voltage accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck power stage applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CSD95372BQ5M | Lower 35-A continuous current rating; identical pinout and feature set except reduced current capability. | Suitable for mid-tier VR designs where 45-A headroom is unnecessary; lower thermal dissipation at same load. | Select when system peak current remains below 35 A and cost optimization is prioritized over margin. |
| ISL99227BIRZ | 40-A continuous rating; supports 1.5-MHz max switching; includes digital temperature reporting via SMBus instead of analog TAO. | Better suited for systems requiring digital telemetry integration; lacks FCCM pin but offers programmable diode emulation via register interface. | Choose when firmware-controlled power management and digital bus communication are required over analog simplicity. |
Compared with CSD95373BQ5MT, CSD95372BQ5M offers identical functionality at reduced current capacity, while ISL99227BIRZ trades analog sensing simplicity for digital configurability and slightly higher frequency ceiling - both require validation of thermal and layout constraints before drop-in use.
Availability
CSD95373BQ5MT is available at Aetrix Electronics and suitable for server CPU VR, GPU memory regulation, and high-density POL applications requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for CSD95373BQ5MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.
The CSD95373BQ5MT belongs to TI's NexFET™ Smart Power Stage product line, engineered specifically for high-efficiency, high-current, high-frequency VR applications in datacenter and computing platforms.
FAQ
What is the maximum recommended input voltage for the CSD95373BQ5MT?
The CSD95373BQ5MT has an absolute maximum VIN-to-PGND rating of 25 V, but the recommended operating condition specifies a maximum input voltage of 16 V. Exceeding 16 V may cause excessive AC voltage overshoot on the VSW node during switching transients, risking reliability. The CSD95373BQ5MT is typically operated at 12 V input in VR12.x applications with VOUT = 1.2 V.
Does the CSD95373BQ5MT require an external bootstrap diode?
No, the CSD95373BQ5MT integrates a bootstrap diode internally. The BOOT pin connects to a minimum 0.1-µF, 16-V X7R ceramic capacitor referenced to BOOT_R, which is internally tied to VSW. This eliminates the need for an external bootstrap diode and reduces component count and layout area in the power stage design.
How does the TAO/FAULT pin function in multiphase configurations using multiple CSD95373BQ5MT devices?
In multiphase systems, the TAO/FAULT pins of all CSD95373BQ5MT units are wired together with a single pull-up resistor. Due to the integrated ORing diode, only the highest die temperature among all phases is reported on the shared line. If any CSD95373BQ5MT enters thermal shutdown, its TAO/FAULT pin is pulled to 3.3 V, signaling system-level fault detection without requiring individual monitoring lines.
What is the purpose of the FCCM pin on the CSD95373BQ5MT?
The FCCM pin on the CSD95373BQ5MT selects between Forced Continuous Conduction Mode (HIGH) and Diode Emulation Mode (LOW). In diode emulation, the low-side FET is turned off during light-load conditions to reduce switching losses and improve efficiency. An internal 5-µA current source pulls FCCM to 3.3 V if left floating, defaulting to FCCM operation.
Can the CSD95373BQ5MT be used with 3.3-V PWM controllers?
Yes, the CSD95373BQ5MT supports both 3.3-V and 5-V PWM logic levels. Its tri-state PWM input interprets logic HIGH as HS-on/LS-off, logic LOW as HS-off/LS-on, and Hi-Z (after t3HT hold-off time) as both FETs off. This dual-voltage compatibility allows direct interfacing with modern low-voltage controllers such as the TPS53661 without level-shifting circuitry.
CSD95373BQ5MT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- NexFET™
- Package/Case:
- 12-PowerLFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Half Bridge
- Applications:
- Synchronous Buck Converters
- Interface:
- PWM
- Load Type:
- Inductive
- Technology:
- Power MOSFET
- Rds On (Typ):
- -
- Current - Output / Channel:
- 45A
- Current - Peak Output:
- 67A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 4.5V ~ 16V
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Features:
- Bootstrap Circuit, Status Flag
- Fault Protection:
- Current Limiting, Over Temperature, Shoot-Through, Short Circuit, UVLO
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-LSON-CLIP (5x6)
CSD95373BQ5MT FAQ
1.How can I place an order for CSD95373BQ5MT through Aetrix?
Please submit a Request for Quotation (RFQ) for CSD95373BQ5MT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CSD95373BQ5MT reliable?
The price and inventory of CSD95373BQ5MT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CSD95373BQ5MT is usually 5 days.
3.What payment methods are accepted for CSD95373BQ5MT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CSD95373BQ5MT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CSD95373BQ5MT?
CSD95373BQ5MT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CSD95373BQ5MT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CSD95373BQ5MT?
For technical support, including CSD95373BQ5MT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CSD95373BQ5MT requirements.
6.How does Aetrix verify that CSD95373BQ5MT is sourced from the original manufacturer or authorized distributors?
All CSD95373BQ5MT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CSD95373BQ5MT meets industry standards.
7.What is the process for return or replacement of CSD95373BQ5MT?
All CSD95373BQ5MT units undergo pre-shipment inspection (PSI). If there is an issue with CSD95373BQ5MT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CSD95373BQ5MT part is unused and in its original packaging.
Return procedure for CSD95373BQ5MT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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