Texas Instruments CSD95495QVMT
- Part No.:
- CSD95495QVMT
- Manufacturer:
- Texas Instruments
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- 18-PowerTFDFN
- Datasheet:
-
CSD95495QVMT.pdf
- Description:
- IC HALF BRIDGE DRIVER 50A 18VSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
CSD95495QVMT from Texas Instruments is a synchronous buck NexFET™ Smart Power Stage integrating driver IC and dual power MOSFETs in a single VSON-CLIP (DMH) package. It delivers 50-A continuous output current, supports up to 1.25-MHz switching frequency, and features temperature-compensated bi-directional current sensing and analog temperature output - enabling high-density, high-efficiency VR12.x/VR13.x voltage regulation for server CPU/GPU power delivery.
For engineers reviewing the CSD95495QVMT datasheet, CSD95495QVMT pinout, CSD95495QVMT application, or CSD95495QVMT equivalent, key selection criteria include its 18-pin VSON-CLIP thermal performance, tri-state PWM compatibility, diode emulation mode, integrated bootstrap switch, and system-level fault monitoring via TAO/FAULT pin.
Technical Context
The CSD95495QVMT implements a high-speed synchronous buck power stage with integrated gate drivers, HS/LS MOSFETs, and precision current-sensing circuitry. Its internal current sense uses REF-IN/IOUT differential pair with LSET resistor calibration and VOS feedback path, while TAO provides a linear voltage proportional to junction temperature.
It operates under forced continuous conduction mode (FCCM) or diode emulation mode via EN/FCCM pin control, supports 4.5–16-V input range and 5.5-V max output, and integrates shoot-through protection with optimized dead time. The VSW node connects directly to external inductor, and BOOT/BOOT_R forms a self-contained bootstrap supply for the high-side FET.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Continuous Output Current | 50 A at VIN = 12 V, VDD = 5 V, VOUT = 1.2 V, fSW = 500 kHz - enables single-phase support for high-current CPU cores. |
| Peak Output Current | 75 A for tp = 50 µs - sustains transient load steps without saturation or thermal shutdown. |
| Switching Frequency | Up to 1250 kHz - allows smaller magnetics and faster transient response in POL applications. |
| System Efficiency | Over 93.5% at 25 A - reduces power loss and thermal load in dense server VRMs. |
| Junction Temperature Range | –40°C to +125°C - supports operation in thermally constrained server and GPU board environments. |
| Input Voltage Range | 4.5 V to 16 V - compatible with 5-V, 12-V, and intermediate bus architectures. |
| PWM Compatibility | 3.3-V and 5-V logic levels - interoperable with TI's TPS53679 and other VR controller families. |
Pinout & Package
VSON-CLIP (DMH) package: 4.00 mm × 5.00 mm outline, 18-pin exposed thermal pad, RoHS-exempt NIPDAU/SN finish, MSL Level-2-260°C-1 year rating. Thermal pad must be soldered to PCB for mechanical integrity and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| REFIN | Current sense reference input | DC bias point for internal current amplifier; sets zero-current offset for IOUT output. |
| IOUT | Current sense amplifier output | Voltage proportional to phase current (V(IOUT) – V(REFIN)); used by controller for closed-loop regulation. |
| LSET | Inductor value calibration | Resistor-to-PGND sets gain for internal current sensing; enables accurate scaling across inductor values. |
| VDD | Driver supply rail | 4.5–5.5 V supply for gate drivers and internal logic; decoupling required near pin. |
| VOS | Output voltage sense feedback | Connects to converter output to enable internal current sense compensation against VOUT variations. |
| VSW | Phase node (HS source / LS drain) | High-di/dt switching node; connects directly to output inductor; requires tight layout and low-inductance routing. |
| VIN | Main input power supply | 4.5–16 V input; multiple pins (10–13) reduce IR drop and improve high-current delivery. |
| BOOT / BOOT_R | Bootstrap supply terminals | Integrated bootstrap diode; 0.1-µF ceramic cap between BOOT and BOOT_R supplies HS gate drive. |
| PWM | Tri-state gate control input | Logic high → HS on / LS off; logic low → HS off / LS on; Hi-Z > t3HT → both FETs off (safe shutdown). |
| EN/FCCM | Enable / Diode Emulation control | Tri-state window enables diode emulation; high = FCCM; low = disable; internal pull-down if floating. |
| TAO/FAULT | Temperature output / fault indicator | Analog voltage ∝ die temperature; pulled to 3.3 V during thermal shutdown, LSOC, or HSS fault. |
| PGND | Power ground return | Low-impedance return path for HS/LS FETs and current sense circuitry; separate from AGND. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Bootstrap Switch | Eliminates external bootstrap diode; reduces BOM count and improves reliability in high-frequency operation. |
| Temperature-Compensated Current Sense | Bi-directional sensing with on-die temperature compensation ensures ±3% current accuracy over –40°C to +125°C. |
| Diode Emulation Mode | Reduces light-load losses by turning off LS FET during discontinuous conduction, improving efficiency at <10% load. |
| Ultra-Low-Inductance Package | VSON-CLIP construction minimizes parasitic loop inductance (<0.3 nH), suppressing VSW ringing and EMI. |
| System-Optimized PCB Footprint | Thermal pad and pin layout match TI's recommended land pattern (SLUA271), enabling optimal thermal transfer and manufacturability. |
Applications
| Server CPU VRM | GPU Power Delivery |
|---|---|
|
Use Scenario: High-current, fast-transient power delivery to multi-core Xeon or EPYC processors in 1U/2U rack servers. IC Role / Device Role / Timing Role: Synchronous buck power stage providing regulated 0.8–1.8 V output with sub-100 ns load-step response. Use Value: 50-A continuous rating and 75-A peak capability eliminate need for multiphase paralleling in mid-tier CPUs. |
Use Scenario: Compact, high-efficiency voltage regulation for discrete graphics cards requiring dynamic VDD/GFX voltage scaling. IC Role / Device Role / Timing Role: Single-phase smart power stage controlled by TPS53679 or similar 6+1-phase VR controller. Use Value: 93.5% efficiency at 25 A reduces heatsink size and enables fanless GPU designs in edge AI accelerators. |
| Memory Module VR | AI Accelerator POL |
|
Use Scenario: Point-of-load regulation for DDR4/DDR5 memory subsystems with strict ripple and transient requirements. IC Role / Device Role / Timing Role: Buck stage delivering stable 1.1–1.35 V to memory controllers and DRAM banks with <10 mV p-p ripple. Use Value: Integrated current and temperature sensing simplifies telemetry and enables predictive thermal throttling. |
Use Scenario: Distributed power conversion for FPGA-based AI inference cards with heterogeneous voltage rails. IC Role / Device Role / Timing Role: High-frequency (1 MHz+) POL stage supporting rapid DVFS transitions in real-time inference pipelines. Use Value: 1.25-MHz max switching frequency allows use of 100-nH inductors, reducing board area by >30% vs. 500-kHz designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck power stage applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| CSD95492QVM | Same 18-pin VSON-CLIP package, but rated for 40-A continuous current and lower peak (60 A); identical pinout and feature set. | Suitable for lower-power CPU cores or memory VR where 50-A headroom is unnecessary. | Select CSD95492QVM when thermal budget or cost sensitivity favors reduced current rating without sacrificing layout compatibility. |
| TPS53679 | 6+1-phase VR controller IC (not a power stage); drives external NexFET stages including CSD95495QVMT; includes SMBus interface and VR13.x compliance. | Used upstream to control CSD95495QVMT in full VRM solutions; not a direct functional replacement. | Pair TPS53679 with CSD95495QVMT for complete VR13.x-compliant server CPU VRM with telemetry and adaptive voltage positioning. |
Compared with CSD95492QVM, the CSD95495QVMT offers +10-A continuous current headroom and +15-A peak margin for demanding transient loads; compared with TPS53679, it serves a complementary role as the power-switching element rather than the control intelligence - making them functionally interdependent, not interchangeable.
Availability
CSD95495QVMT is available at Aetrix Electronics and suitable for server CPU VRMs, GPU power modules, DDR5 memory regulators, and AI accelerator POL applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for CSD95495QVMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with leadership in high-performance power delivery solutions.
The CSD95495QVMT belongs to TI's NexFET™ Smart Power Stage product line, engineered specifically for high-current, high-frequency, space-constrained VR12.x/VR13.x voltage regulator modules in datacenter and AI infrastructure.
FAQ
What is the maximum switching frequency supported by the CSD95495QVMT?
The CSD95495QVMT supports up to 1250 kHz switching frequency under recommended conditions (CBST ≥ 0.1 µF, VOUT ≤ 2.5 V). This enables compact magnetic design and fast transient response in high-density POL applications. Operation above 1 MHz requires careful attention to gate drive strength, layout parasitics, and thermal management - all validated in TI's SLPS671A datasheet test conditions for CSD95495QVMT.
Does the CSD95495QVMT require an external bootstrap diode?
No, the CSD95495QVMT integrates a bootstrap diode internally. A 0.1-µF, 16-V X5R ceramic capacitor must be placed between BOOT and BOOT_R pins to provide charge storage for the high-side gate driver. This integration eliminates the need for an external diode, reducing component count, layout area, and potential failure points in high-reliability server power systems using CSD95495QVMT.
How does the TAO/FAULT pin function in the CSD95495QVMT?
The TAO/FAULT pin on the CSD95495QVMT outputs an analog voltage linearly proportional to junction temperature and also serves as an open-drain fault indicator. During thermal shutdown, LSOC, or HSS detection, it is actively pulled to 3.3 V. In multiphase configurations, multiple TAO pins can be wire-OR'd to report only the highest temperature - a critical diagnostic feature for thermal-aware VRM control in systems deploying multiple CSD95495QVMT units.
What is the purpose of the LSET pin on the CSD95495QVMT?
The LSET pin on the CSD95495QVMT connects to a resistor tied to PGND to calibrate the internal current-sensing gain based on the actual output inductor value. This resistor sets the transconductance of the current-sense amplifier, ensuring accurate phase current reporting (via IOUT) across different inductor selections - a key enabler for flexible, controller-agnostic design reuse of CSD95495QVMT in varying VRM topologies.
Is the CSD95495QVMT pin-compatible with the CSD95492QVM?
Yes, the CSD95495QVMT and CSD95492QVM share identical 18-pin VSON-CLIP (DMH) packaging, pin assignment, footprint, and thermal pad layout. They are mechanically and electrically pin-compatible, allowing drop-in substitution in existing PCB designs - though the CSD95495QVMT delivers higher current capability (50 A vs. 40 A continuous) and improved thermal margin, making it suitable for upgraded performance without layout changes.
CSD95495QVMT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- NexFET™
- Package/Case:
- 18-PowerTFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Half Bridge (3)
- Applications:
- Synchronous Buck Converters
- Interface:
- PWM
- Load Type:
- Inductive, Capacitive
- Technology:
- Power MOSFET
- Rds On (Typ):
- -
- Current - Output / Channel:
- 50A
- Current - Peak Output:
- 75A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 4.5V ~ 16V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Features:
- Bootstrap Circuit
- Fault Protection:
- Shoot-Through
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 18-VSON (5x4)
CSD95495QVMT FAQ
1.How can I place an order for CSD95495QVMT through Aetrix?
Please submit a Request for Quotation (RFQ) for CSD95495QVMT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CSD95495QVMT reliable?
The price and inventory of CSD95495QVMT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CSD95495QVMT is usually 5 days.
3.What payment methods are accepted for CSD95495QVMT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CSD95495QVMT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CSD95495QVMT?
CSD95495QVMT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CSD95495QVMT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CSD95495QVMT?
For technical support, including CSD95495QVMT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CSD95495QVMT requirements.
6.How does Aetrix verify that CSD95495QVMT is sourced from the original manufacturer or authorized distributors?
All CSD95495QVMT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CSD95495QVMT meets industry standards.
7.What is the process for return or replacement of CSD95495QVMT?
All CSD95495QVMT units undergo pre-shipment inspection (PSI). If there is an issue with CSD95495QVMT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CSD95495QVMT part is unused and in its original packaging.
Return procedure for CSD95495QVMT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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