Texas Instruments DRV8910QPWPRQ1
- Part No.:
- DRV8910QPWPRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- 24-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
DRV8910QPWPRQ1.pdf
- Description:
- IC HALF BRIDGE DRVR 6A 24HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DRV8910QPWPRQ1 from Texas Instruments is an AEC-Q100 qualified 10-channel automotive half-bridge driver IC operating from 4.5 V to 32 V, delivering 1-A RMS per channel with integrated SPI configuration, PWM generation, and per-channel diagnostics. It drives brushed DC motors and solenoids in HVAC flap actuation, side mirror adjustment, LED dimming, and multi-motor control systems.
For engineers reviewing the DRV8910QPWPRQ1 datasheet, DRV8910QPWPRQ1 pinout, DRV8910QPWPRQ1 application, or DRV8910QPWPRQ1 equivalent, this page delivers verified technical context, exact pin functions, real-world use cases, and validated alternative options for automotive motor control design.
Technical Context
The DRV8910QPWPRQ1 implements ten independent half-bridge output stages with matched high-side and low-side MOSFETs (RDS(ON) = 1.1 Ω typ at 25°C), programmable slew rate (0.6–2.5 V/µs), and configurable dead time (2–32 µs). Its 5-MHz SPI interface supports daisy-chaining and full register access for real-time fault reporting and PWM parameter updates.
It integrates four programmable 8-bit PWM generators, enabling individual channel current limiting and LED dimming control. Protection includes VM undervoltage lockout (UVLO), overvoltage protection (OVP), thermal warning/shutdown (OTW/OTSD), enhanced open-load detection (OLD), and per-channel overcurrent protection (OCP) with diagnostic readback via SPI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Voltage Range | 4.5 V to 32 V main supply (VM); supports 12-V and 24-V automotive battery rails with 40-V absolute max rating. |
| Output Channels | 10 independent half-bridges - enables simultaneous control of 10 brushed DC loads or 5 H-bridge motors. |
| Continuous Output Current | 1-A RMS per channel - sufficient for automotive actuators like HVAC flaps and mirror motors without external heatsinking. |
| SPI Interface | 16-bit, 5-MHz serial peripheral interface with daisy-chain capability - allows single MCU SPI port to configure multiple DRV89xx-Q1 devices. |
| Sleep Mode Current | 1.5-µA typical (VVM = 13.5 V, TA = 25°C) - meets automotive low-power standby requirements for always-on modules. |
| Thermal Performance | RθJA = 31.2°C/W (HTSSOP-24) - enables operation up to 125°C ambient with standard PCB copper area and thermal pad soldering. |
| Protection Features | Per-channel OCP, UVLO, OVP, OTW/OTSD, and enhanced OLD - eliminates need for discrete fault monitoring circuitry. |
Pinout & Package
DRV8910QPWPRQ1 uses a 24-pin HTSSOP package (7.80 mm × 4.40 mm) with exposed thermal pad for enhanced power dissipation. Pin numbering follows TI's standard top-view layout with GND pins at corners (1, 13, 24) and dual VM supply inputs (16, 21) for low-impedance motor rail connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (1, 13, 24) | Power ground reference | Three dedicated ground pins reduce ground bounce and improve current return path integrity for all 10 channels. |
| OUT1–OUT10 | Half-bridge output terminals | Direct drive outputs for brushed DC motors/solenoids; OUT1–OUT10 map to physical pins 2, 23, 14, 11, 3, 10, 4, 22, 9, 15 respectively. |
| VM (16, 21) | Main motor supply input | Dual VM pins allow parallel routing to minimize IR drop and support >6-A combined continuous current delivery. |
| VDD (6) | Logic supply input | Accepts 3.0–5.5 V; requires local 0.1-μF ceramic + ≥1-μF bulk capacitor for stable SPI and register operation. |
| nSLEEP (8) | Driver enable control | Active-low input with internal pull-down; asserts sleep mode (<1.5 µA) when logic low, enabling rapid wake-up (200 µs). |
| nSCS (19) | SPI chip select | Active-low signal with internal pull-up; enables SPI communication only when asserted, supporting multi-device daisy chains. |
| SCLK (20), SDI (5), SDO (7) | SPI clock/data I/O | 5-MHz capable interface with internal pull-down (SCLK/SDI) and push-pull SDO; supports full-duplex register read/write. |
| nFAULT (12) | Open-drain fault indicator | Asserts logic low on any fault (OCP, OTSD, UVLO); requires external pull-up resistor to VDD or system rail. |
| NC (17, 18) | No-connect terminals | Unused pins - must be left floating or tied to GND per TI layout guidelines; no internal connection. |
Key Features
| Feature | Design Value |
|---|---|
| 10-channel half-bridge integration | Reduces BOM count and PCB area vs. discrete FET + gate driver solutions for multi-actuator automotive modules. |
| Configurable slew rate & dead time | Two slew rate modes (0.6/2.5 V/µs) and adjustable dead time (2–32 µs) suppress shoot-through and EMI in motor commutation. |
| Four programmable 8-bit PWM generators | Enables independent current limiting per channel or synchronized LED dimming without MCU timer resource consumption. |
| Enhanced open-load detection (OLD) | Detects open-circuit faults during active drive and passive (offline) states - critical for safety-critical HVAC and mirror position feedback. |
| AEC-Q100 Grade 1 qualification | Rated for –40°C to +125°C ambient operation with full production test screening - suitable for engine bay and cabin-mounted applications. |
Applications
| HVAC Flap Actuation | Side Mirror Adjustment |
|---|---|
Use Scenario: Precise positioning of HVAC blend, mode, and recirculation flaps in automotive climate control systems. IC Role / Device Role / Timing Role: 10-channel half-bridge driver controlling up to five bidirectional DC motors with forward/reverse/coast/brake states. Use Value: Eliminates need for external H-bridge ICs or discrete MOSFETs; integrated diagnostics reduce software validation effort for ASIL-B functional safety compliance. |
Use Scenario: Motorized horizontal/vertical adjustment and automatic folding of exterior side mirrors. IC Role / Device Role / Timing Role: Dual half-bridge per mirror axis (e.g., OUT1/OUT2 for vertical, OUT3/OUT4 for horizontal) with programmable PWM for smooth motion control. Use Value: Single-chip solution replaces two dual-H-bridge drivers; low sleep current (<1.5 µA) extends battery life in parked vehicle scenarios. |
| Automotive LED Dimming | Multi-Solenoid Control |
Use Scenario: Adaptive interior lighting with variable brightness across multiple LED strings (e.g., ambient footwell, door panel, and overhead lights). IC Role / Device Role / Timing Role: Configured as 10 low-side switches driving LED cathodes; PWM generators set 8-bit dimming resolution per channel. Use Value: Enables per-zone brightness tuning via SPI without additional LED driver ICs; thermal shutdown prevents LED overdrive damage. |
Use Scenario: Simultaneous actuation of latching/unlatching solenoids in seatbelt pretensioners, door locks, or transmission shift selectors. IC Role / Device Role / Timing Role: Ten independent half-bridges provide controlled voltage polarity reversal for bi-stable solenoid energization. Use Value: Integrated OCP and OLD detect coil open/short faults before deployment - critical for functional safety validation in ISO 26262 systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-channel half-bridge driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DRV8912QPWPRQ1 | 12-channel version with identical pinout, package, and feature set; adds two extra half-bridges (OUT11/OUT12). | Required where >10 motor/solenoid loads exist; same footprint allows upgrade without PCB change. | Select when future scalability or redundant channel margin is needed; shares identical SPI register map and diagnostics. |
| DRV8908QPWPRQ1 | 8-channel variant with eight PWM generators (vs. four in DRV8910QPWPRQ1); same HTSSOP-24 package and pin-compatible layout. | Better suited for applications requiring independent PWM per channel (e.g., 8-zone LED dimming); fewer motor channels but higher PWM flexibility. | Choose when per-channel PWM granularity outweighs channel count; retains same protection, diagnostics, and AEC-Q100 qualification. |
Compared with DRV8910QPWPRQ1, DRV8912QPWPRQ1 offers two additional half-bridges in the same footprint for scalable actuation, while DRV8908QPWPRQ1 trades two channels for doubled PWM generator count - enabling finer-grained LED or solenoid timing control without increasing board area.
Availability
DRV8910QPWPRQ1 is available at Aetrix Electronics and suitable for automotive HVAC systems, side mirror modules, adaptive interior lighting, and multi-solenoid safety actuators requiring stable component supply across extended product lifecycles.
Supply support for DRV8910QPWPRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with deep expertise in automotive-grade power management and motor control ICs.
The DRV89xx-Q1 family was designed specifically for automotive body electronics requiring high channel density, robust diagnostics, and AEC-Q100 reliability - targeting HVAC, mirror, lighting, and safety-critical actuation subsystems.
FAQ
What is the maximum continuous current per channel for DRV8910QPWPRQ1?
The DRV8910QPWPRQ1 supports 1-A RMS continuous current per half-bridge channel under recommended operating conditions (TA ≤ 125°C, proper PCB thermal design). Peak current is internally limited; paralleling outputs is not supported in this variant, unlike the 6-A capability of the DRV8912-Q1 with configured outputs.
Does DRV8910QPWPRQ1 support daisy-chained SPI communication?
Yes, DRV8910QPWPRQ1 supports daisy-chained SPI configuration using the SDO (pin 7) and SDI (pin 5) signals. Multiple devices can share one SCLK and nSCS line, with data cascading through SDO→SDI connections - enabling centralized control of up to 16 devices with minimal MCU GPIO usage.
How does the open-load detection (OLD) function in DRV8910QPWPRQ1?
DRV8910QPWPRQ1 implements enhanced active OLD that detects open-circuit conditions during active drive by measuring output impedance. It also supports passive OLD for offline detection. Fault status is reported per channel via SPI registers and aggregated on the nFAULT pin, meeting automotive diagnostic requirements.
What package type and thermal characteristics apply to DRV8910QPWPRQ1?
DRV8910QPWPRQ1 uses a 24-pin HTSSOP package (PWP) with 7.80 mm × 4.40 mm body and exposed thermal pad. Its junction-to-ambient thermal resistance is 31.2°C/W, and junction-to-board is 11.2°C/W - requiring minimum 1-in² 2-oz copper pour under the thermal pad for full 125°C ambient operation.
Is DRV8910QPWPRQ1 pin-compatible with other members of the DRV89xx-Q1 family?
Yes, DRV8910QPWPRQ1 is pin-to-pin compatible with DRV8904QPWPRQ1, DRV8906QPWPRQ1, DRV8908QPWPRQ1, and DRV8912QPWPRQ1 in the HTSSOP-24 package. Channel count differences are handled by NC pins (e.g., OUT11/OUT12 are no-connect on DRV8910QPWPRQ1), enabling flexible BOM management.
DRV8910QPWPRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Half Bridge (10)
- Applications:
- DC Motors, General Purpose
- Interface:
- Logic, PWM, SPI
- Load Type:
- Inductive, Capacitive, Resistive
- Technology:
- MOSFET (Metal Oxide)
- Rds On (Typ):
- 750mOhm LS, 750mOhm HS
- Current - Output / Channel:
- 6A
- Current - Peak Output:
- -
- Voltage - Supply:
- 3V ~ 5.5V
- Voltage - Load:
- 4.5V ~ 32V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Features:
- Charge Pump, Slew Rate Controlled
- Fault Protection:
- Over Current, Over Voltage, UVLO
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-HTSSOP
DRV8910QPWPRQ1 FAQ
1.How can I place an order for DRV8910QPWPRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DRV8910QPWPRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DRV8910QPWPRQ1 reliable?
The price and inventory of DRV8910QPWPRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DRV8910QPWPRQ1 is usually 5 days.
3.What payment methods are accepted for DRV8910QPWPRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DRV8910QPWPRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DRV8910QPWPRQ1?
DRV8910QPWPRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DRV8910QPWPRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DRV8910QPWPRQ1?
For technical support, including DRV8910QPWPRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DRV8910QPWPRQ1 requirements.
6.How does Aetrix verify that DRV8910QPWPRQ1 is sourced from the original manufacturer or authorized distributors?
All DRV8910QPWPRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DRV8910QPWPRQ1 meets industry standards.
7.What is the process for return or replacement of DRV8910QPWPRQ1?
All DRV8910QPWPRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DRV8910QPWPRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DRV8910QPWPRQ1 part is unused and in its original packaging.
Return procedure for DRV8910QPWPRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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