Infineon Technologies IGI60F2020A1LAUMA1

Overview

IGI60F2020A1LAUMA1 from Infineon is a CoolGaN™ Integrated Power Stage (IPS) combining two 200 mΩ / 600 V enhancement-mode GaN HEMTs in a half-bridge configuration with isolated gate drivers, supporting up to 3 MHz PWM switching, 47 ns propagation delay, and >300 V/ns CMTI - deployed in active clamp flyback AC/DC chargers and telecom SMPS.

For engineers reviewing the IGI60F2020A1LAUMA1 datasheet, IGI60F2020A1LAUMA1 pinout, IGI60F2020A1LAUMA1 application, or IGI60F2020A1LAUMA1 equivalent, key selection criteria include verified GaN R_DS(on) matching, coreless transformer-based isolation integrity, dual UVLO thresholds (VDDI/VDDL/VDDH), SLDO-configurable input supply, and low-side open-source current sensing capability.

Technical Context

The device integrates high- and low-side GaN switches with dedicated isolated gate drivers using on-chip coreless transformer (CT) technology for level-shifting and galvanic isolation between input, high-side, and low-side domains. Each driver provides rail-to-rail output with 1 A source / 2 A sink capability and independent UVLO monitoring for VDDI (2.85 V), VDDL (6.5 V), and VDDH (6.5 V).

Input logic supports standard LV-TTL levels with 0.8 V hysteresis; ENABLE pin forces both outputs low when deasserted. The SLDO regulator enables VDDI generation from VDDL via external resistor (e.g., 1 kΩ at 8 V), while low-side open-source (SL pins) allows shunt-based current sensing referenced to SL rather than GNDI.

Key Specifications

Pinout & Package

IGI60F2020A1LAUMA1 uses an 8 × 8 mm QFN-28 package (PG-TIQFN-28-1) with exposed thermal pad for enhanced power dissipation. Pin numbering follows top-view layout with SW (switching node) pins centrally located and dedicated high-/low-side gate, supply, and logic terminals distributed for optimal layout separation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar GaN half-bridge power stage applications.

Compared with EPC2152 and GS66508T, IGI60F2020A1LAUMA1 delivers monolithic integration, guaranteed CMTI >300 V/ns, and unified UVLO protection - reducing design risk and board area in high-frequency industrial power supplies.

Availability

IGI60F2020A1LAUMA1 is available at Aetrix Electronics and suitable for AC/DC chargers, telecom SMPS, and LED lighting systems requiring stable component supply, JEDEC-qualified industrial reliability, and high-frequency GaN performance.

Supply support for IGI60F2020A1LAUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive, and industrial control ICs, with leadership in silicon carbide and gallium nitride power devices.

This part belongs to Infineon's CoolGaN™ Integrated Power Stage product line, designed specifically to simplify high-frequency, high-efficiency power conversion by merging GaN switches and isolated gate drivers into a single qualified package.

FAQ

What is the maximum recommended operating junction temperature for IGI60F2020A1LAUMA1?

The device is rated for a maximum junction temperature of +150 °C per JEDEC qualification. Thermal design must maintain T_j ≤ 150 °C under worst-case load, ambient, and airflow conditions. The QFN-28 package features an exposed thermal pad requiring ≥ 300 mm² copper area with ≥ 6 thermal vias to achieve θ_JA ≤ 35 K/W in typical 4-layer PCB layouts.

Can I operate IGI60F2020A1LAUMA1 with only one 8 V supply?

Yes - VDDI can be generated from VDDL using the internal SLDO by connecting SLDON (pin 23) to GNDI and placing a 1 kΩ resistor (RVDDI) between VDDL and VDDI. This eliminates the need for a separate 3.3 V rail while maintaining full functionality, including UVLO monitoring and CT signal integrity.

How is current sensing implemented with the low-side open-source configuration?

Current sensing is achieved by placing a shunt resistor between SL pins (12–16) and GNDI. Because SL is the low-side source node - not tied to GNDI - the voltage across the shunt directly reflects load current. This avoids ground-loop errors and enables accurate cycle-by-cycle current limiting without additional amplifiers or isolation.

Does IGI60F2020A1LAUMA1 support shoot-through protection?

No internal shoot-through protection logic is included. Safe operation relies on external PWM controller dead-time insertion and RC tuning of GH/GL gate networks to ensure controlled turn-off before turn-on. The 47 ns propagation delay and <1 ns channel-to-channel mismatch enable precise external timing control, but complementary PWM signals must be validated in-system.