Infineon Technologies IRG4CC30FB

Overview

IRG4CC30FB from Infineon (formerly International Rectifier) is a 600 V, 6 A rated IGBT die in bare-die wafer form, optimized for fast switching in high-efficiency power conversion stages. It features 1.7 V max V_CE(sat) at 6 A/25°C, 600 V min V_(BR)CES, and gate threshold voltage between 3.0–6.0 V - used in industrial motor drives and UPS inverters requiring compact, thermally optimized discrete power switches.

For engineers reviewing the IRG4CC30FB datasheet, IRG4CC30FB pinout (emitter-collector-gate terminal layout), IRG4CC30FB application in half-bridge inverters or resonant converters, or IRG4CC30FB equivalent for wafer-level integration into custom modules, this page delivers verified mechanical, electrical, and handling specifications directly applicable to die attach, packaging, and thermal design.

Technical Context

This IGBT die implements a trench-gate field-stop structure enabling low conduction loss and fast turn-off with controlled tail current. Its Cr-Ni/V-Ag backmetal stack supports high-current solder die attach (1–2.5 kA), while the 4 µm Al-Si front metallization ensures robust wire bonding reliability on the 0.141" × 0.164" die outline.

Rated for 600 V blocking and 6 A DC collector current, it operates with V_GE(th) spanning 3.0–6.0 V and exhibits ≤250 µA I_CES at full rated V_CE, confirming stable off-state integrity under high-temperature bias conditions typical in industrial power modules.

Key Specifications

Pinout & Package

IRG4CC30FB is supplied as an unpackaged silicon die on a 150 mm (6") wafer with standard <100> flat orientation. Terminal configuration follows standard IGBT die layout: Emitter (E), Collector (C), and Gate (G) are located on the front side, with E and C occupying large-area metallized pads and G centered on the active region edge. No plastic or ceramic package is present - mounting requires die attach to substrate followed by wire bonding.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar IGBT die applications.

Compared with IRG4BC30F, IRG4CC30FB offers wafer-level flexibility for custom module integration but requires advanced packaging capability; versus FGA25N120ANTD, it delivers lower conduction loss at 600 V but lacks voltage headroom for 800 V architectures.

Availability

IRG4CC30FB is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, solar microinverters, and induction heating generators requiring stable component supply and traceable wafer-lot sourcing.

Supply support for IRG4CC30FB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power semiconductors, microcontrollers, and sensor solutions for industrial, automotive, and energy markets.

IRG4CC30FB belongs to the legacy IR "C-Series" IGBT die family, engineered for cost-sensitive, high-volume industrial inverters where fast switching, low V_CE(sat), and proven wafer-level reliability are critical.

FAQ

What is the recommended die attach temperature for IRG4CC30FB?

The manufacturer specifies that die attach temperature must not exceed 300°C to prevent degradation of the Cr-Ni/V-Ag backmetal adhesion and Al-Si front metallization integrity. Exceeding this limit risks intermetallic formation, reduced thermal cycling life, and increased V_CE(sat) drift over time. Lead-free solder or silver sinter processes meeting this thermal ceiling are validated for use.

Does IRG4CC30FB include integrated gate protection?

No, IRG4CC30FB is a bare die without integrated gate protection diodes, TVS elements, or active clamping circuitry. External gate resistor selection (typically 10–47 Ω), RC snubbers, and isolated gate drivers with negative turn-off voltage are required to manage dV/dt-induced false triggering and gate oxide stress during fast switching.

Can IRG4CC30FB be used in parallel configurations?

Yes, but only with matched die lots and symmetrical layout. The 3.0–6.0 V V_GE(th) spread necessitates gate voltage trimming or active current balancing for multi-die paralleling. Thermal coupling via shared heatsink and identical bond wire lengths are mandatory to avoid current imbalance exceeding 15% at full load.

What wafer-level documentation accompanies IRG4CC30FB shipments?

Each shipment includes a wafer map showing ink-dot locations for functional die, mechanical drawing 01-5225 defining street width (≥100 µm), die outline, and metallization layers, plus lot-specific test data for V_CE(sat), V_(BR)CES, and I_CES per MIL-STD-883 screening conditions.