STMicroelectronics MASTERGAN5

Overview

MASTERGAN5 from STMicroelectronics is a 600 V system-in-package integrating a half-bridge gate driver and two enhancement-mode GaN HEMTs in a single QFN 9 × 9 × 1 mm package. It delivers R_DS(ON) = 450 mΩ, I_DS(MAX) = 4 A (DC @ T_CB = 25 °C), zero reverse recovery charge, and features UVLO on both high-side and low-side sections, interlocking logic, and dedicated shutdown (SD/OD) functionality - enabling high-efficiency, compact resonant LLC and active-clamp flyback converters.

For engineers reviewing the MASTERGAN5 datasheet, MASTERGAN5 pinout, MASTERGAN5 application, or MASTERGAN5 equivalent, this device supports fast-switching, high-voltage DC-DC and AC-DC power conversion with accurate timing match, bootstrap diode integration, and thermal shutdown protection - critical for evaluating GaN-based SMPS design trade-offs, layout simplification, and BOM reduction.

Technical Context

The MASTERGAN5 implements a fully integrated half-bridge topology with independent high-side and low-side GaN transistors sharing a common source node (SENSE) and drain node (VS for high-side, OUT for low-side). Its driver core includes matched propagation delays (T_{d_GL} = T_{d_GH} = 46 ns typ), interlocking logic to prevent cross-conduction, and dual UVLO monitoring (V_CC and V_BO) with hysteresis (0.3 V typ).

It employs an internal bootstrap structure with integrated DMOS diode (R_DBoot = 140–175 Ω), eliminating need for external bootstrap diodes below 500 kHz. Thermal shutdown triggers at T_TSD = 175 °C with 20 °C hysteresis, and logic inputs (HIN/LIN/SD/OD) support 3.3–15 V logic levels with internal pull-down resistors (90–220 kΩ) and 120 ns minimum pulse width requirement.

Key Specifications

Pinout & Package

MASTERGAN5 is housed in a thermally enhanced QFN 9 × 9 × 1 mm package with 31 leads and 0.6 mm pitch, featuring three exposed pads (EP1, EP2, EP3) for GND, SENSE, and VS thermal anchoring.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage GaN half-bridge applications.

Compared with GS66508T and UCC27624, MASTERGAN5 trades off current scalability and driver flexibility for drastic BOM reduction, layout simplicity, and guaranteed timing matching - making it optimal for space-constrained, medium-power (<300 W) GaN SMPS where time-to-market and reliability outweigh customization needs.

Availability

MASTERGAN5 is available at Aetrix Electronics and suitable for resonant LLC converters, active-clamp flyback adapters, and high-voltage PFC stages requiring stable component supply, consistent parametric performance across production lots, and long-term industrial lifecycle support.

Supply support for MASTERGAN5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.

MASTERGAN5 belongs to ST's MASTERGAN family of GaN system-in-package devices, engineered specifically to accelerate adoption of gallium nitride in high-frequency, high-efficiency power conversion - targeting compact, high-density SMPS designs where integration, reliability, and ease of use are paramount.

FAQ

What is the recommended minimum dead time between high-side and low-side switching?

The MASTERGAN5 incorporates hardware interlocking that enforces a minimum dead time of 5 ns (typical) to prevent cross-conduction. This is fixed by internal logic and does not require external configuration. For optimal reliability in hard-switched applications, designers should still ensure controller-level dead time exceeds 20 ns to accommodate propagation delays and layout skew.

Can MASTERGAN5 operate with 3.3 V logic inputs?

Yes - MASTERGAN5 logic inputs (HIN, LIN, SD/OD) support 3.3 V to 15 V logic levels with hysteresis. The high-level threshold (V_IH) is 2.17 V (typ) at 25 °C, ensuring robust recognition of 3.3 V CMOS signals. Internal 150 kΩ pull-down resistors guarantee safe OFF-state default if inputs float.

Does MASTERGAN5 require an external bootstrap diode?

No - MASTERGAN5 integrates a patented high-voltage DMOS bootstrap diode (R_DBoot = 140–175 Ω) connected between VCC and BOOT. An external diode is optional and only recommended for operation above 500 kHz to improve charge replenishment speed and reduce voltage droop under heavy load.

How is thermal shutdown signaled to the system controller?

During thermal shutdown, MASTERGAN5 forces the SD/OD pin low in open-drain mode, sinking up to 50 mA. This allows direct connection to a microcontroller GPIO with pull-up resistor for fault interrupt generation. Recovery occurs automatically when junction temperature falls below (175 − 20) = 155 °C and SD/OD voltage rises above 2.17 V.