Monolithic Power Systems Inc. MP86905GR-P

Overview

MP86905GR-P from Monolithic Power Systems is a monolithic half-bridge Intelli-Phase™ power stage integrating high-side and low-side MOSFETs, gate drivers, current sense (9.7 µA/A), temperature sense (10 mV/°C), and fault reporting. It delivers 50 A continuous output current with 4.5–16 V input range, operates up to 2 MHz, and targets high-density server core voltage regulation.

For engineers reviewing the MP86905GR-P datasheet, MP86905GR-P pinout, MP86905GR-P application, or MP86905GR-P equivalent, this device supports tri-state PWM control, diode emulation mode, cycle-by-cycle current limiting (75 A HS / –30 A LS), over-temperature shutdown at 160°C, and precise junction temperature monitoring for multi-phase thermal balancing.

Technical Context

The MP86905GR-P implements a fully integrated half-bridge topology with level-shifted high-side driver and adaptive dead-time control (3–35 ns), enabling efficient synchronous buck operation in multi-phase VRs. Its internal Accu-Sense™ current sensing provides bi-directional inductor current feedback with ±2% gain accuracy across 15–50 A.

It features a dedicated VTEMP analog output (–100 mV offset, 10 mV/°C) for real-time junction temperature reporting and an open-drain FAULT# signal that latches on four-cycle HS over-current, OTP (>160°C), or SW-to-PGND short - all resettable via EN toggle or supply recycle.

Key Specifications

Pinout & Package

MP86905GR-P is housed in a thermally enhanced FC-QFN-23 package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad for low θJB (2°C/W) and optimized PGND vias for minimal switching loop inductance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge power stage applications.

Compared with MP86955GR-P, the MP86905GR-P offers identical feature depth at lower current rating - ideal for cost-optimized 50 A server VRs. Against ISL99390HRZ-T, it adds tri-state PWM flexibility and tighter dead-time control, improving light-load efficiency and transient response in modern digital VR controllers.

Availability

MP86905GR-P is available at Aetrix Electronics and suitable for server core voltage regulation, GPU power delivery, AI accelerator VRMs, and high-density power modules requiring stable component supply and long-term industrial lifecycle support.

Supply support for MP86905GR-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs for computing, cloud, automotive, and industrial markets.

The MP86905GR-P belongs to MPS's Intelli-Phase™ family - engineered specifically for high-current, high-frequency multi-phase buck converters in data center and AI hardware, emphasizing integration, thermal efficiency, and digital controller interoperability.

FAQ

What is the recommended bootstrap capacitor value for MP86905GR-P?

Monolithic Power Systems specifies a 0.1 µF to 1 µF ceramic capacitor (0402 size preferred) between BST and SW pins. This capacitor must be placed as close as possible to the device to maintain gate drive integrity during high dI/dt switching events. Typical designs use 0.22 µF X7R 0402 capacitors rated for ≥16 V.

How does the MP86905GR-P implement diode emulation mode?

Diode emulation is activated by pulling SYNC low, floating the PWM input, or driving PWM to a mid-voltage (1.1–1.9 V). In this mode, the low-side FET turns on during positive inductor current and turns off at zero-current crossing - eliminating reverse recovery losses and improving light-load efficiency without requiring controller modifications.

Can MP86905GR-P operate with a 3.3 V only supply for both VDD and VDRV?

Yes - the device requires a single 3.3 V supply connected to both VDRV and VDD (via a 2.2 Ω resistor per datasheet). VDD UVLO is 2.9 V (rising), and VDRV UVLO is 2.9 V (rising), ensuring robust operation across industrial temperature ranges with standard 3.3 V LDOs or DC-DC outputs.

What is the meaning of the "GR-P" suffix in MP86905GR-P?

The "GR-P" suffix denotes the QFN-23 (4 mm × 4 mm) package with lead-free, halogen-free, RoHS-compliant finish and tape-and-reel packaging (–Z implied). The "GR" indicates the FC-QFN package variant, and "P" confirms green (Pb-free) compliance per MPS quality standards.

How is the FAULT# signal reset after a latched fault condition?

A latched FAULT# (triggered by 4-cycle HS over-current or OTP) is cleared by toggling the EN pin low then high, recycling VIN or VDRV supplies, or cycling the 3.3 V bias rails. The device resumes normal operation within one PWM cycle after reset - no external reset pulse or I²C command is required.

Does MP86905GR-P support phase shedding in multi-phase systems?

Yes - the EN pin provides per-phase enable/disable control. When EN is pulled low, the SW node enters high-impedance state and all internal circuitry powers down, reducing quiescent current to 40 µA. This enables dynamic phase shedding under light loads while maintaining fast reactivation (<1 µs) for transient response.

What is the maximum allowable negative inductor current before LS-FET shutdown?

The MP86905GR-P limits negative inductor current to –30 A (cycle-by-cycle). Upon detection, the LS-FET is turned off for 40 ns to clamp reverse current - a non-latching event that does not assert FAULT# and maintains continuous operation during aggressive CCM-to-DCM transitions.