Monolithic Power Systems Inc. MP86920GLV-Z

Overview

MP86920GLV-Z from Monolithic Power Systems is a monolithic half-bridge Intelli-Phase™ solution integrating high-side and low-side power MOSFETs, gate drivers, current sense, and temperature sense in a single LGA-27 (4mm×5mm) package. It delivers 20A continuous output current, operates from 4.5V to 16V input, supports 100kHz–2MHz switching, and features tri-state PWM acceptance for diode emulation mode - optimized for server VRs and multi-phase buck regulators.

For engineers reviewing the MP86920GLV-Z datasheet, MP86920GLV-Z pinout, MP86920GLV-Z application, or MP86920GLV-Z equivalent, key selection considerations include its integrated current/temperature sensing, 3ns rising / 8ns falling dead time, fault reporting via TMON/FLT, bootstrap-enabled high-side drive, and compatibility with tri-state controller interfaces in high-density power stages.

Technical Context

The MP86920GLV-Z implements a fully integrated half-bridge topology with internal HS/LS FETs, driver logic, zero-current detection (ZCD), and cycle-by-cycle over-current protection. Its tri-state PWM interface enables seamless transition into diode emulation mode without external control logic.

It embeds bidirectional current sensing (10μA/A gain, ±2% accuracy) and junction temperature monitoring (8mV/°C, 800mV offset at 25°C), both routed to the TMON/FLT pin for shared fault reporting and thermal telemetry. The device latches off on four-cycle HS over-current or >160°C junction temperature, requiring VIN/VDD or EN reset.

Key Specifications

Pinout & Package

LGA-27 (4mm × 5mm) package with exposed thermal pad; RoHS-compliant, halogen-free, lead-free construction. Designed for high thermal conductivity via multiple PGND vias and bottom-side copper thermal spreading.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge power stage applications.

Compared with IR35203 and CSD97395Q4M, the MP86920GLV-Z uniquely combines tri-state PWM acceptance, shared TMON/FLT telemetry, and LGA-27 miniaturization - making it optimal for space-constrained, analog-controller-based multi-phase designs requiring embedded diagnostics.

Availability

MP86920GLV-Z is available at Aetrix Electronics and suitable for server VRMs, telecom baseband supplies, and graphics card core regulators requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for MP86920GLV-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP86920 belongs to MPS's Intelli-Phase™ family - engineered specifically for high-current, high-efficiency, space-constrained DC/DC power stages in cloud infrastructure and AI hardware, where integration, thermal performance, and analog telemetry are critical.

FAQ

What is the function of the TMON/FLT pin?

The TMON/FLT pin serves dual roles: as an analog temperature sensor output (8mV/°C, 800mV offset at 25°C) and as a fault indicator. During over-current, over-temperature (>160°C), or SW-to-PGND short events, it is actively pulled to VDD (≈3.3V) to signal fault condition - eliminating need for separate fault and thermal monitoring lines.

How does tri-state PWM enable diode emulation mode?

When the PWM input is floated or driven to a middle voltage (1.1–1.9V) for ≥50ns, the MP86920 immediately turns off the HS-FET and activates the LS-FET in diode emulation mode. The LS-FET remains on until zero-current detection (ZCD) confirms inductor current has decayed to 0A, minimizing reverse recovery losses and improving light-load efficiency.

What is the recommended BST capacitor value and placement?

A 0.1µF to 1µF ceramic capacitor must be placed directly between BST and PHASE pins. Routing should use ≥20-mil trace width with no vias in the BST path. This capacitor sustains the floating gate drive voltage for the HS-FET during high-side conduction, ensuring reliable turn-on across the full input range.

Can the MP86920GLV-Z operate without an external bootstrap diode?

Yes. The MP86920GLV-Z integrates a bootstrap switch, eliminating the need for an external bootstrap diode or charge pump circuit. This simplifies layout, reduces component count, and avoids diode forward-voltage drop and reverse-recovery issues that degrade HS-FET gate drive strength.

What is the minimum SW pulse width supported?

The MP86920GLV-Z supports a minimum SW pulse width of 30ns. This enables stable operation at switching frequencies up to 2MHz while maintaining sufficient on/off time margin for gate drive timing, dead time insertion, and ZCD detection accuracy.

How is current sensing implemented on the CS pin?

The CS pin provides a bidirectional current source proportional to inductor current (10μA/A). A resistor (R_CS) converts this to a voltage (V_CS = I_L × 10μA/A × R_CS). For linear operation, V_CS must remain within 0.8V–2.0V - enabling real-time current monitoring for phase balancing, OCP, and AVP without external amplifiers or shunts.

What thermal metrics define its PCB layout requirements?

The MP86920GLV-Z has θ_JB = 4.3°C/W and θ_{JC_TOP} = 18.7°C/W. Effective thermal design requires multiple PGND vias under the package, a solid inner-layer VIN plane, and direct thermal coupling from the LGA thermal pad to internal ground planes - all verified in MPS Application Note AN-107.