Monolithic Power Systems Inc. MP86956GMJT-Z

Overview

MP86956GMJT-Z from Monolithic Power Systems is a monolithic half-bridge Intelli-Phase™ solution integrating high-side and low-side power MOSFETs with gate drivers in a TLGA-41 (5mm × 6mm) package. It delivers 70A continuous output current, operates from 3V to 16V input, supports 100kHz–3MHz switching, and features Accu-Sense™ bidirectional current sensing and junction temperature reporting - optimized for server core voltage regulation.

For engineers reviewing the MP86955GMJT-Z datasheet, MP86956GMJT-Z pinout, MP86956GMJT-Z application, or MP86956GMJT-Z equivalent, key selection criteria include tri-state PWM compatibility, ±35A/110A current limit thresholds, 2ns–28ns programmable dead time, thermal shutdown at 160°C, and IOUT sense gain accuracy of ±2% over 20–70A range.

Technical Context

The MP86956 implements a fully integrated half-bridge topology with internal HS/LS FETs and driver logic, eliminating external gate drive components and minimizing parasitic inductance. Its tri-state PWM interface enables diode emulation mode via mid-voltage or floating input, triggering zero-current detection for synchronous rectification control.

Current sensing uses a calibrated 5μA/A bidirectional IOUT current source referenced to an external resistor, supporting phase-current balancing and active voltage positioning. Temperature sensing on TOUT/FLT provides 8mV/°C linear output with 800mV offset at 25°C and fault-flag pull-up to VDD upon OTP, overcurrent latch, or SW-PGND short.

Key Specifications

Pinout & Package

MP86956GMJT-Z is housed in a TLGA-41 (5mm × 6mm) thermally enhanced land-grid array package with exposed thermal pad and 0.4mm pitch. The package supports bottom-side heat dissipation and achieves θJC_TOP = 2.0°C/W for direct heatsink coupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monolithic half-bridge power stage applications.

Compared with MP86956GMJT-Z, the LGA variant trades top-side thermal performance for legacy footprint compatibility, while MP86957GMJT-Z extends current-sense functionality at higher current rating - making MP86956GMJT-Z optimal for thermally aggressive server VRMs needing proven 70A stability and minimal bill-of-materials.

Availability

MP86956GMJT-Z is available at Aetrix Electronics and suitable for server core voltage regulation, GPU power delivery, and high-density power modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP86956GMJT-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over two decades of expertise in DC/DC conversion, motor control, and power modules.

The MP86956 belongs to MPS's Intelli-Phase™ monolithic power stage product line, engineered specifically for high-current, high-efficiency point-of-load regulation in datacenter and AI hardware where thermal density, layout simplicity, and current-sense fidelity are critical.

FAQ

What is the function of the TOUT/FLT pin?

The TOUT/FLT pin serves dual roles: it outputs a temperature-proportional voltage (8mV/°C with 800mV offset at 25°C) during normal operation, and pulls up to VDD during faults including over-temperature (>160°C), HS current-limit latch (eight consecutive cycles), or SW-PGND short. This single-pin reporting simplifies system-level fault diagnostics without requiring additional GPIOs.

How does the tri-state PWM interface operate?

The tri-state PWM input accepts three states: logic high (HS on), logic low (LS on), or mid-voltage (1.1–1.8V) or floating (internally biased to ~1.5V). When in tri-state, the HS-FET turns off immediately and the LS-FET enters diode emulation mode - staying on until zero-current detection occurs - improving light-load efficiency without external circuitry.

What is the recommended BST capacitor value and placement?

A 0.1µF to 0.22µF ceramic capacitor is required between BST and SW pins. It must be placed within 2mm of the MP86956GMJT-Z package with minimal trace length and no vias in the BST loop to maintain robust high-side gate drive under 70A switching. Use X7R or better dielectric with 16V+ rating.

Can MP86956GMJT-Z be used in single-phase applications?

Yes - MP86956GMJT-Z functions as a standalone half-bridge stage in single-phase buck converters. Its 70A rating supports up to ~84W at 1.2V output, making it suitable for high-end FPGA or ASIC core rails. For higher power, parallel phases or multi-phase controllers are recommended to distribute thermal load and improve transient response.

What is the purpose of the AGND and PGND separation?

AGND isolates analog circuitry (VDD regulator, current/temperature sense) from high-di/dt power ground noise. PGND carries switching currents from HS/LS FETs. They must connect only at the VDD decoupling capacitor's ground node to prevent ground bounce from corrupting IOUT and TOUT/FLT signals - ensuring ±2% current sense accuracy and reliable thermal reporting.

Does MP86956GMJT-Z support multi-phase current balancing?

Yes - its bidirectional IOUT pin delivers a 5μA/A current-proportional signal with ±2% gain accuracy across 20–70A. When fed into a multi-phase controller's ADC, this enables real-time per-phase current measurement for closed-loop balancing, overcurrent protection, and active voltage positioning - critical for symmetric load sharing in 4+ phase VRMs.

What is the minimum PWM pulse width supported?

The MP86956GMJT-Z supports a minimum PWM pulse width of 30ns, verified by characterization. This enables stable operation at 3MHz switching frequency (333ns period) with ≥10% duty cycle headroom, supporting high-frequency designs that reduce output inductor size while maintaining control loop stability.