Monolithic Power Systems Inc. MP86956GMJ-Z

Overview

MP86956GMJ-Z from Monolithic Power Systems is a monolithic half-bridge Intelli-Phase™ solution integrating high-side and low-side power MOSFETs with gate drivers in a single LGA-41 (5mm × 6mm) package. It delivers 70A continuous output current, operates across 3V–16V input range, supports 100kHz–3MHz switching frequency, and features Accu-Sense™ bidirectional current sensing and junction temperature monitoring - deployed in server core voltage regulation where compact size and thermal efficiency are critical.

For engineers reviewing the MP86956GMJ-Z datasheet, MP86956GMJ-Z pinout, MP86956GMJ-Z application, or MP86956GMJ-Z equivalent, key selection considerations include tri-state PWM compatibility, integrated 70A current capability with cycle-by-cycle HS current limit (110A), ±35A LS valley current limit, 2ns–28ns programmable dead time, and dual-function TOUT/FLT pin for simultaneous temperature reporting (8mV/°C) and fault signaling.

Technical Context

The MP86956GMJ-Z implements a fully integrated half-bridge topology with internal HS/LS MOSFETs driven by a matched gate driver stage optimized for minimal parasitic inductance and precise dead-time control (2ns rising / 6–28ns falling). Its tri-state PWM interface enables diode emulation mode via mid-voltage or floating input, allowing zero-current detection and synchronous rectification without external controllers.

It integrates two independent analog monitoring paths: IOUT provides 5μA/A bidirectional current sense output with ±2% gain accuracy over 20–70A, while TOUT/FLT delivers 8mV/°C temperature-sense voltage referenced to 800mV at 25°C and switches to VDD-level fault reporting upon OTP (>160°C), HS overcurrent latch (8-cycle), or SW-PGND short detection.

Key Specifications

Pinout & Package

LGA-41 (5mm × 6mm) package with exposed thermal pad on bottom side; pin 1 marked by index area; RoHS-compliant, halogen-free construction; θ_JB = 2.2°C/W, θ_{JC_TOP} = 8.7°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monolithic half-bridge power stage applications.

Compared with MP86956GMJ-Z, the GMJT-Z offers superior top-side thermal resistance for cold-plate integration without changing layout, while the MP86957GMJ-Z trades tri-state PWM flexibility and current-source sensing for higher current rating and voltage-output interface - making GMJ-Z optimal for balanced thermal design in standard server VRMs.

Availability

MP86956GMJ-Z is available at Aetrix Electronics and suitable for server core voltage regulation, GPU power delivery, AI accelerator modules, and telecom intermediate bus converters requiring stable component supply, long-lifecycle support, and traceable sourcing.

Supply support for MP86956GMJ-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over 20 years of expertise in DC/DC conversion, motor drivers, and power modules.

The MP86956 belongs to MPS's Intelli-Phase™ family of monolithic power stages, designed specifically for high-current, high-efficiency, multi-phase buck regulators in data center and AI infrastructure applications.

FAQ

What is the maximum continuous output current rating for MP86956GMJ-Z?

The MP86956GMJ-Z is rated for 70A continuous output current under typical thermal conditions: VIN = 12V, FSW = 500kHz, L = 150nH, with proper PCB layout including ≥8 PGND vias and input MLCCs placed adjacent to VIN/PGND pins. Peak current capability reaches 110A for cycle-by-cycle HS overcurrent protection.

Does MP86956GMJ-Z support tri-state PWM input, and how is it implemented?

Yes - MP86956GMJ-Z accepts tri-state PWM inputs within 1.10V–1.80V threshold window. When PWM floats or is driven to this mid-voltage range for ≥50ns, the HS-FET turns off immediately and the LS-FET enters diode emulation mode until zero-current detection, enabling lossless light-load operation without external ZCD circuitry.

How does the IOUT pin function, and what is its accuracy range?

IOUT is a bidirectional current-source output with 5μA/A gain, delivering ±350μA for ±70A inductor current. Its accuracy is ±2% over 20A–70A range. The output voltage must be maintained between 0.7V–2.1V using an external resistor (RIOUT) tied to a reference voltage (VCM) to ensure linear operation and avoid saturation.

What fault conditions trigger the TOUT/FLT pin to assert high, and how are they distinguished?

TOUT/FLT pulls to VDD during three fault events: HS overcurrent (8 consecutive cycles), junction temperature >160°C, or SW-PGND short. Fault type is identified by PWM pin resistance: 10kΩ to AGND (HS OC), 20kΩ to AGND (OTP), or 1kΩ to VDD (SW-PGND short). All faults latch until EN toggle or VIN/VDD recycle.

What is the recommended bootstrap capacitor value and placement for MP86956GMJ-Z?

A 0.1µF–0.22µF ceramic capacitor is required between BST and SW pins. It must be placed within 2mm of the BST pin with minimum trace length and no vias in the loop to maintain gate drive integrity. Use X7R or better dielectric; avoid 0402 packages with insufficient voltage rating - 0603 or 0805 preferred.

Can MP86956GMJ-Z operate with input voltages below 3V, and what happens at UVLO?

No - VIN under-voltage lockout (UVLO) activates at 2.5V (rising) with 450mV hysteresis. Below 2.5V, the device shuts down, placing SW in high-impedance state and disabling IOUT/TOUT/FLT outputs. Operation is guaranteed only within 3.0V–16V input range per datasheet specifications.

Is there a difference in thermal performance between MP86956GMJ-Z and MP86956GMJT-Z?

Yes - the TLGA-41 (GMJT-Z) variant has θ_{JC_TOP} = 2.0°C/W versus 8.7°C/W for LGA-41 (GMJ-Z), enabling more effective top-side cooling. Both share identical θ_JB = 2.2°C/W, meaning board-level thermal resistance is unchanged. TLGA is preferred when cold plates or heatsinks contact the package top surface.