Monolithic Power Systems Inc. MP86961DU-LF-P

Overview

MP86961DU-LF-P from Monolithic Power Systems is a monolithic half-bridge Intelli-Phase™ power stage integrating high-side and low-side MOSFETs with gate driver, delivering 20A continuous output current at up to 1MHz switching frequency across 4.5V–21V input range. It features tri-state PWM interface, 5V logic compatibility, and 5×5mm QFN package optimized for notebook core voltage regulation.

For engineers reviewing the MP86961DU-LF-P datasheet, MP86961DU-LF-P pinout, MP86961DU-LF-P application, or MP86961DU-LF-P equivalent, key selection criteria include dead-time control (5ns rising / 10ns falling), bootstrap-based high-side drive, thermal resistance (θJA = 36°C/W), and diode emulation mode via SYNC pin.

Technical Context

The MP86961 operates as a synchronous buck half-bridge power stage with integrated driver and dual MOSFETs. Its internal logic supports tri-state PWM input, enabling high-impedance SW state during idle or phase shedding. The device uses bootstrap capacitor (BST) for high-side gate drive and includes VCC under-voltage lockout (3.7V rising threshold) and thermal shutdown protection.

It accepts 5V logic-level EN and PWM inputs, supports diode emulation when SYNC is pulled low, and delivers precise timing control: 20ns USW turn-on delay, 45ns LSW turn-on delay, and 30ns/10ns upper/lower switch turn-off propagation delays. The exposed-pad QFN thermally connects IN, SW, and GND pins to PCB copper for enhanced heat dissipation.

Key Specifications

Pinout & Package

MP86961DU-LF-P is housed in an 18-pin 5×5mm QFN with exposed thermal pad (IN/SW/GND). The package features fused SW pins (10–18), dual GND banks (pins 1–8, 10–18), and dedicated AGND (pin 3) for signal integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge power stage applications.

Compared with ISL99143IRZ-T7A and TPS53679RTAT, MP86961DU-LF-P offers superior tri-state PWM support for dynamic phase management, smallest footprint among 20A-integrated stages, and lowest thermal resistance-making it optimal for thermally constrained, analog-controlled VRMs.

Availability

MP86961DU-LF-P is available at Aetrix Electronics and suitable for high-density notebook VRMs, GPU core regulators, and multi-phase server memory supplies requiring stable component supply and long-term lifecycle continuity.

Supply support for MP86961DU-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of leadership in DC-DC conversion and motor control.

The MP86961 belongs to MPS's Intelli-Phase™ integrated power stage product line, engineered specifically for high-current, high-frequency buck converters in computing and graphics applications where size, efficiency, and thermal performance are critical.

FAQ

What is the minimum recommended BST capacitor value for MP86961DU-LF-P?

The datasheet specifies a minimum BST capacitor of 100nF, rated for ≥16V, placed directly between BST and SW pins. Using less capacitance risks insufficient high-side gate drive voltage during high-duty-cycle operation, leading to increased R_DS(on) and thermal stress. A 1Ω series resistor is also recommended for damping.

Can MP86961DU-LF-P operate without an external VCC supply?

No. VCC (pin 2) must be supplied with a regulated 4.5V–5.5V bias source independent of VIN. The internal LDO does not generate VCC; it only regulates auxiliary supplies. Omitting VCC prevents driver activation and results in permanent high-impedance SW state regardless of EN or PWM signals.

How does the SYNC pin affect efficiency at light load?

Pulling SYNC low disables synchronous rectification, forcing the low-side MOSFET to behave as a diode. This avoids reverse recovery losses and enables discontinuous conduction mode (DCM), improving light-load efficiency by up to 8% at 1A output compared to forced continuous conduction mode.

Is the exposed thermal pad electrically connected to any internal node?

Yes. The exposed pad is internally connected to IN, SW, and GND terminals. It must be soldered to a large PCB copper area tied to the main power ground plane. Connecting it only to signal ground or leaving it floating violates thermal and electrical specifications and may cause premature failure.

What is the purpose of the tri-state PWM input functionality?

The tri-state PWM input allows the SW node to enter high-impedance state when PWM is open-circuited or held at mid-voltage (1.0–1.7V). This enables true phase shedding in multi-phase VRMs without requiring controller-level PWM blanking, reducing system-level complexity and improving transient response during load steps.

Does MP86961DU-LF-P support 3.3V logic-level PWM inputs?

No. The PWM input thresholds are defined for 5V logic: high threshold is 3.7V, low threshold is 0.4V, and tri-state region spans 1.0–1.7V. Applying 3.3V logic risks incomplete turn-on or unintended tri-state behavior, degrading efficiency and causing erratic switching. A level shifter is required for 3.3V controllers.

What is the maximum allowable junction temperature during continuous 20A operation?

The absolute maximum junction temperature is 150°C, but the recommended operating limit is 125°C. At 20A, 12V input, and 1.2V output, thermal simulation shows junction temperature reaches 122°C on a 4-layer PCB with 4cm² exposed copper and 200 LFM airflow-confirming safe continuous operation within spec.