Monolithic Power Systems Inc. MP86962GMJT-P

Overview

MP86962GMJT-P from Monolithic Power Systems is a radiation-tolerant, monolithic half-bridge DrMOS power stage integrating high- and low-side MOSFETs, gate drivers, current sense (5 μA/A), temperature sense (8 mV/°C), and fault reporting in a single TLGA-41 (5mm×6mm) package. It delivers up to 80 A continuous output current across 3–16 V input voltage, supports 100 kHz–3 MHz switching, and enables tri-state PWM control for diode emulation in server core voltage regulation.

For engineers reviewing the MP86962GMJT-P datasheet, MP86962GMJT-P pinout, MP86962GMJT-P application, or MP86962GMJT-P equivalent, key selection criteria include its 80 A current capability, integrated Accu-Sense™ current sensing, junction temperature monitoring via TOUT/FLT, dead time control (2–28 ns), and radiation tolerance for high-reliability computing environments.

Technical Context

The MP86962GMJT-P implements a monolithic half-bridge architecture with integrated silicon-based power FETs and driver logic, eliminating external gate drive components and minimizing parasitic inductance. Its tri-state PWM interface enables seamless transition into diode emulation mode upon detection of zero-crossing current (ZCD), supporting high-efficiency light-load operation in multi-phase buck converters.

It features cycle-by-cycle overcurrent protection with 110 A high-side limit and –35 A low-side valley limit, plus over-temperature shutdown at 160 °C. Fault reporting is consolidated on the TOUT/FLT pin, which outputs either analog temperature voltage (8 mV/°C, 800 mV offset) or digital pull-up to VDD during HS OC, OTP, or SW-to-PGND short events.

Key Specifications

Pinout & Package

MP86962GMJT-P uses a TLGA-41 (5 mm × 6 mm) thermally enhanced land-grid array package with exposed PGND pads for low-inductance, high-current routing and efficient heat dissipation to the PCB.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monolithic DrMOS power stage applications.

Compared with IR35221 and SiC8xx, MP86962GMJT-P uniquely integrates radiation tolerance, 80 A capacity, tri-state PWM, and single-pin temperature/fault reporting - making it optimal for next-gen server VRMs where reliability, density, and telemetry consolidation are critical.

Availability

MP86962GMJT-P is available at Aetrix Electronics and suitable for server core voltage regulation, GPU power delivery, AI accelerator power modules, and high-density telecom VRMs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for MP86962GMJT-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with expertise in DC/DC conversion, motor drivers, and integrated power stages since 1997.

The MP86962 belongs to MPS's Intelli-Phase™ DrMOS product line, designed specifically for high-current, high-efficiency, radiation-hardened computing power delivery in data centers and aerospace-grade systems.

FAQ

What is the maximum continuous output current supported by MP86962GMJT-P?

The MP86962GMJT-P delivers up to 80 A continuous output current under typical thermal conditions (TJ ≤ 125 °C, proper PCB layout with ≥6 thermal vias per PGND pad). Peak instantaneous current capability is 125 A, limited by absolute maximum ratings and layout-dependent thermal resistance (θJB = 2.7 °C/W).

How does the tri-state PWM function enable diode emulation mode?

When the PWM input voltage resides within the 1.1–1.8 V tri-state window for ≥40 ns, the MP86962GMJT-P disables the high-side FET and activates diode emulation on the low-side FET. The LS-FET remains on during positive inductor current and turns off after zero-current detection (ZCD), reducing reverse conduction losses at light loads.

Can the TOUT/FLT pin be used simultaneously for temperature monitoring and fault reporting?

No - TOUT/FLT operates in two mutually exclusive modes. During normal operation (no fault), it outputs an analog voltage proportional to junction temperature (8 mV/°C, 800 mV offset). When any fault occurs (HS OC, OTP, or SW–PGND short), it pulls high to VDD and holds that state until EN is toggled or VIN/VDD is recycled.

What is the recommended BST capacitor value and placement for MP86962GMJT-P?

A 0.1 μF to 0.22 μF ceramic capacitor is required between BST and PHASE pins. It must be placed within 2 mm of the pins, using a direct, wide trace (≥20 mils) with no vias in the BST path. This ensures robust high-side gate drive during bootstrapping at up to 3 MHz switching frequency.

Does MP86962GMJT-P support multi-phase current sharing and synchronization?

Yes - the device supports multi-phase operation via shared TOUT/FLT lines (per Figure 3 in datasheet) and synchronized PWM inputs. Its Accu-Sense™ current sense output (5 μA/A) provides matched per-phase current data to the controller, enabling precise phase-current balancing and active voltage positioning (AVP) in VR13/VR14 systems.

What is the thermal resistance from junction to board (θJB) for the TLGA-41 package?

The measured thermal resistance from junction to board (θJB) is 2.7 °C/W under standard JEDEC test conditions (JESD51-7, 1 in² 2-oz copper, 6 thermal vias). This value assumes optimal PCB layout with full PGND pad connection and adequate copper area beneath the package.

Is MP86962GMJT-P lead-free, halogen-free, and RoHS compliant?

Yes - MP86962GMJT-P is fully lead-free, halogen-free, and complies with the EU RoHS Directive 2011/65/EU. MPS confirms green status per its Quality Assurance documentation, and the device meets IPC/JEDEC J-STD-020 moisture sensitivity level (MSL) 3 requirements.