STMicroelectronics PWD13F60TR

Overview

PWD13F60TR from STMicroelectronics is a high-density power driver integrating four N-channel 600 V, 320 mΩ MOSFETs and dual gate drivers in a single VFQFPN package. It operates as a full-bridge or two independent half-bridges, supports 6.5–15 V logic inputs with hysteresis, features interlocking to prevent cross-conduction, and includes integrated bootstrap diodes for high-side drive. It is used in industrial motor drives, HID ballasts, and DC-AC inverters.

For engineers reviewing the PWD13F60TR datasheet, PWD13F60TR pinout, PWD13F60TR application, or PWD13F60TR equivalent, key selection criteria include its 600 V BVDSS rating, dual independent half-bridge configuration, UVLO protection on both VCC1/VCC2 rails, interlocked logic input behavior per Table 9, and thermal resistance Rth(J-CB) = 1.1 °C/W per MOSFET.

Technical Context

The device implements two fully independent gate driver channels, each with dedicated VCCx, BOOTx, SENSEx, and GNDx pins, enabling isolated control of two half-bridges. Each channel integrates high-side and low-side drivers with matched propagation delays and synchronized interlock logic that forces both outputs OFF when HINx = LINx = 1.

Its bootstrap architecture replaces external fast-recovery diodes with an internal DMOS-diode structure actively driven by the low-side gate signal, ensuring efficient high-side supply recharge during LS conduction. UVLO circuitry monitors VCC1 and VCC2 independently, disabling only the affected half-bridge upon undervoltage detection.

Key Specifications

Pinout & Package

The PWD13F60TR is housed in a VFQFPN 10 × 13 × 1.0 mm package with exposed thermal pads (EPAD1–EPAD7) for enhanced heat dissipation. The package uses a 28-pin layout with five dedicated ground/power pads and dual independent power domains for robust noise isolation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-voltage full-bridge driver applications.

Compared with IRS2005STRPBF, PWD13F60TR reduces component count and layout area but trades off external MOSFET flexibility; versus STK5C4U36JR, it offers superior power density and lower conduction loss at the expense of integrated protection features.

Availability

PWD13F60TR is available at Aetrix Electronics and suitable for industrial motor drives, HID lamp ballasts, and DC-AC inverters requiring stable component supply across multi-year production cycles.

Supply support for PWD13F60TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and power applications.

The PWD13F60TR belongs to ST's Power Driver family, engineered specifically for high-density, high-voltage motor control and lighting applications where integration, thermal performance, and shoot-through immunity are critical.

FAQ

What is the maximum continuous output current per half-bridge at 100 °C case temperature?

The PWD13F60TR supports 6.9 A DC per MOSFET at TCB = 100 °C, as specified in Table 2. This corresponds to 6.9 A per half-bridge output (OUT1 or OUT2), assuming balanced current sharing and adequate PCB copper area for thermal dissipation via EPADs.

Can the PWD13F60TR be used in a three-phase inverter configuration?

Yes - two PWD13F60TR devices can implement a complete 3-phase inverter: one handles phases U/V, the other handles phase W plus provides redundancy. Each device's dual half-bridge supports two legs; the third leg requires either a second device or external half-bridge components.

Is an external bootstrap capacitor required, and what value is recommended?

Yes, an external bootstrap capacitor is mandatory for high-side operation. ST recommends 100 nF ceramic capacitors placed close to BOOT1/BOOT2 and VCC1/VCC2 pins. The capacitor must withstand ≥600 V and exhibit low ESR to maintain stable gate drive during high-frequency switching.

Does the interlock function override the input logic states, and how does it behave during UVLO?

Yes - interlock forces both HS and LS outputs OFF whenever HINx = LINx = 1, regardless of input state. During UVLO, only the affected half-bridge (VCC1 or VCC2) disables its outputs; the healthy channel continues normal operation, preserving partial system functionality.