Infineon Technologies SIGC42T60UNX1SA1

Overview

SIGC42T60UNX1SA1 from Infineon Technologies is a 600 V, 50 A high-speed NPT IGBT bare die optimized for hard-switching power conversion. It features 2.8–3.15 V V_CE(sat) at 15 V gate drive and 50 A, 100 µm chip thickness, short-circuit ruggedness, and positive temperature coefficient for stable parallel operation. Used in welding inverters, PFC stages, and UPS output stages.

For engineers reviewing the SIGC42T60UNX1SA1 datasheet, SIGC42T60UNX1SA1 pinout (emitter/gate/collector terminals), SIGC42T60UNX1SA1 application in PFC or UPS, or SIGC42T60UNX1SA1 equivalent bare-die IGBTs, this page delivers verified die-level specifications, thermal and switching performance data, mechanical layout, and direct substitution guidance aligned with Infineon's SGW50N60HS module integration path.

Technical Context

This NPT (Non-Punch-Through) IGBT die employs a 100 µm thick silicon structure with photoimide passivation and Al–Si 1% emitter metallization. Its 6.5 × 6.5 mm² active area (35.6 mm²) supports 50 A DC current at T_j = 150 °C with 350 ns turn-off delay and 20 ns fall time under 400 V / 50 A inductive load conditions.

The device exhibits a 3–5 V gate-emitter threshold voltage (V_GE(th)) and ±20 V gate-emitter voltage rating, enabling robust gate drive design. Low E_off (confirmed via dynamic test data) and 158 pF reverse transfer capacitance (C_rss) support high-frequency switching up to 20 kHz in industrial SMPS and motor drives.

Key Specifications

Pinout & Package

Package: Bare die (unmounted silicon chip), sawn on foil, 6.5 × 6.5 mm² outline, 100 µm thickness, photoimide passivation, Al–Si 1% emitter metallization, Ni–Ag collector metallization. Not housed in TO-247 or any leaded package - requires custom die bonding and wire bonding assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed NPT IGBT bare-die applications.

Compared with IKB20N60T, SIGC42T60UNX1SA1 delivers 2.5× higher current handling and lower conduction loss; versus SGW50N60HS, it offers superior thermal interface control and reduced parasitic inductance but requires full die-attach and wire-bond process qualification.

Availability

SIGC42T60UNX1SA1 is available at Aetrix Electronics and suitable for welding inverters, active PFC modules, and online UPS output stages requiring stable component supply, long-lifecycle support, and traceable bare-die sourcing.

Supply support for SIGC42T60UNX1SA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power semiconductors, microcontrollers, and sensor solutions for industrial, automotive, and energy markets.

SIGC42T60UNX1SA1 belongs to Infineon's High-Speed NPT IGBT die family, engineered specifically for high-efficiency, high-reliability industrial power conversion where thermal management, paralleling stability, and short-circuit robustness are critical.

FAQ

Is SIGC42T60UNX1SA1 a packaged device or bare die?

SIGC42T60UNX1SA1 is a bare silicon die - unmounted, sawn on foil, with no leadframe, molding compound, or standardized package. It requires die bonding to a substrate and aluminum wire bonding for interconnection. The referenced SGW50N60HS is the packaged TO-247 version using this same die.

What gate drive voltage is recommended for reliable operation?

Infineon specifies ±20 V maximum gate-emitter voltage and recommends +15 V turn-on and 0 V or −5 V turn-off for optimal switching performance and ruggedness. A V_GE(th) of 3–5 V ensures noise immunity while maintaining low gate charge requirements for 20 kHz operation.

Can SIGC42T60UNX1SA1 be paralleled without external emitter resistors?

Yes - its positive temperature coefficient of V_CE(sat) ensures inherent current balancing under thermal stress. Parallel operation has been validated in welding inverter designs using matched dies, identical thermal mounting, and symmetrical gate routing; no ballasting resistors are needed if layout symmetry is maintained.

What is the maximum allowable junction temperature during short-circuit testing?

The device is rated for short-circuit withstand at T_j = 150 °C for 10 µs under V_CE = 600 V. This is validated per Infineon's internal test standard and forms the basis for UPS overload protection schemes. Exceeding 10 µs or operating above 150 °C risks irreversible latch-up or thermal runaway.