STMicroelectronics STDRIVEG600

Overview

STDRIVEG600 from STMicroelectronics is a high-voltage half-bridge gate driver IC designed specifically for enhancement-mode GaN FETs and N-channel MOSFETs, featuring 600 V high-side capability, ±200 V/ns dV/dt immunity, 45 ns propagation delay with tight matching, and dual UVLO protection on both high- and low-side sections. It enables high-efficiency, high-frequency PFC, DC-DC, and motor drive topologies in industrial and solar power systems.

For engineers reviewing the STDRIVEG600 datasheet, STDRIVEG600 pinout, STDRIVEG600 application, or STDRIVEG600 equivalent, key selection criteria include bootstrap voltage tolerance (up to 530 V), separated turn-on/turn-off gate outputs, interlocking logic to prevent cross-conduction, TTL/CMOS-compatible 3.3 V inputs, and integrated thermal shutdown with open-drain fault signaling.

Technical Context

The STDRIVEG600 integrates dual independent gate drivers with level-shifted high-side output, dedicated bootstrap supply (BOOT–OUT), and isolated power rails (VCC, PVCC, BOOT) enabling robust operation in hard-switching GaN-based half-bridges. Its interlocking function enforces mutual exclusion between HIN and LIN, while internal pull-down resistors (90–220 kΩ) ensure safe default-off state during controller reset or signal loss.

UVLO protection operates independently on VCC (4.2 V ON / 4.2 V OFF threshold with 0.3 V hysteresis) and VBO (4.0 V ON / 3.7 V OFF with 0.3 V hysteresis), preventing partial drive during undervoltage conditions. Thermal shutdown triggers at 175 °C (typ) with 20 °C hysteresis and signals via SD/OD pin, supporting external timing extension using COD capacitor.

Key Specifications

Pinout & Package

STDRIVEG600 is housed in a SO-16 package with exposed pad for thermal enhancement. Pin 1 is marked by a dot; pins 6, 8, and 12 are NC (not connected). The layout separates logic (SGND), low-side power (PGND), and high-side floating (OUT, BOOT) domains to minimize noise coupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with IRS2007M and UCC27282, STDRIVEG600 uniquely combines GaN-optimized dV/dt immunity, hardware interlocking, dual UVLO, and integrated fault signaling-making it the only choice for robust, high-density 500 V+ GaN half-bridges requiring zero-shoot-through assurance and thermal fail-safe behavior.

Availability

STDRIVEG600 is available at Aetrix Electronics and suitable for solar microinverters, industrial motor drives, server PSU PFC stages, and UPS inverter modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for STDRIVEG600 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, power, microcontroller, and sensor solutions for industrial, automotive, and consumer markets.

The STDRIVE series targets high-performance power conversion, with STDRIVEG600 specifically engineered for GaN-based high-frequency, high-voltage half-bridge topologies demanding ultra-fast timing, rugged dV/dt immunity, and integrated protection.

FAQ

What is the minimum recommended bootstrap voltage (VBO) for reliable high-side turn-on?

The STDRIVEG600 requires VBO ≥ 5 V to guarantee proper high-side turn-on propagation. Below this threshold, propagation delay increases significantly and may result in missed commands at high load currents-especially in GaN hard-switching topologies where OUT can dip below ground. Designers should size the bootstrap capacitor and diode to maintain VBO above 5 V across the entire switching cycle under worst-case load and temperature conditions.

How does the interlocking function prevent shoot-through in half-bridge configurations?

The interlocking function is implemented in hardware: when both HIN and LIN inputs are high simultaneously, the internal logic forces both HON/HOFF and LON/LOFF outputs low-regardless of input timing or propagation skew. This eliminates shoot-through risk even if controller firmware generates overlapping PWM signals or experiences transient glitches, providing fail-safe protection that cannot be bypassed by software.

Can STDRIVEG600 drive silicon carbide (SiC) MOSFETs, or is it limited to GaN and Si MOSFETs?

STDRIVEG600 is fully compatible with SiC MOSFETs. Its 600 V high-side rating, ±200 V/ns dV/dt immunity, 5.5 A peak source current, and 45 ns propagation delay meet the core requirements of 650 V SiC half-bridges in PFC and inverter stages. However, SiC devices typically require higher gate drive voltage (15–20 V) than GaN, so PVCC must be set accordingly-and the device's 20 V absolute maximum rating on PVCC must not be exceeded.

What is the role of the PGND pin, and why is it separate from SGND?

PGND provides a dedicated return path for low-side gate drive current and shunt resistor sensing, physically isolated from SGND (logic ground) to prevent high di/dt noise from corrupting logic signals. This separation enables Kelvin-source connections for GaN/SiC FETs and supports accurate current measurement using low-value shunts without requiring isolated amplifiers-reducing system cost and complexity in high-precision motor and power supply designs.