NXP Semiconductors UBA2032TS/N2,118
- Part No.:
- UBA2032TS/N2,118
- Manufacturer:
- NXP Semiconductors
- Category:
- Full Half-Bridge (H Bridge) Drivers
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
UBA2032TS/N2,118.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 28SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,299
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UBA2032TS/N2,118 from NXP Semiconductors (formerly Philips) is a high-voltage monolithic full-bridge gate driver IC fabricated in EZ-HV SOI process. It drives four external MOSFETs in full-bridge topology, supports up to 550 V bridge voltage, integrates bootstrap diodes and high-voltage level shifters, and features adaptive non-overlap timing - designed specifically for High Intensity Discharge (HID) lamp commutation in automotive and industrial lighting systems.
For engineers reviewing the UBA2032TS/N2,118 datasheet, UBA2032TS/N2,118 pinout, UBA2032TS/N2,118 application, or UBA2032TS/N2,118 equivalent, this page delivers verified technical context, SSOP28 package mapping, oscillator frequency adjustability (up to 100 kHz internal / 200 kHz external), bridge disable function, and start-up delay control - all critical for HID ballast design validation and layout planning.
Technical Context
The UBA2032TS/N2,118 implements dual-level high-voltage level shifting to drive upper-leg MOSFETs with floating supplies (FSL/FSR), while lower-leg drivers reference PGND. Its adaptive non-overlap circuit senses half-bridge voltage slew rate (5–25 V/µs) to dynamically set minimum 600–1300 ns dead time, eliminating fixed-timing compromises across operating frequencies.
Oscillation mode selection is hardware-configured: internal RC oscillator (kosc = 0.94–1.10) enables 50% duty cycle via ÷2 divider (pin DD = SGND), while external clock input (EXTDR) supports direct or divided operation. Bridge position at startup is predefined when divider is enabled (GHL/GLR HIGH, GLL/GHR LOW), ensuring safe initial state before lamp ignition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Bridge Voltage | 550 V - supports direct connection to HID lamp bus without external HV regulation |
| Oscillator Frequency | Up to 100 kHz (internal) / 200 kHz (external) - sets maximum lamp commutation rate and EMI profile |
| Non-overlap Time | 600–1300 ns (adaptive) - prevents shoot-through by sensing dV/dt on half-bridge nodes |
| Bootstrap Diode VF | 0.8–1.2 V @ 1 mA - integrated diodes reduce BOM count and improve reliability vs discrete solutions |
| Gate Drive Current | 130–180 mA source / 150–200 mA sink - sufficient for driving typical 10–50 nC HID MOSFET gates |
| Logic Supply Range | +LVS to −LVS = 5.75–14 V - allows flexible interface with 5 V or 12 V control logic |
| Disable Threshold | Vref = 1.23–1.35 V - fast, precise shutdown independent of supply rail fluctuations |
Pinout & Package
UBA2032TS/N2,118 is housed in SSOP28 (SOT341-1): plastic shrink small outline package, 28 leads, 5.3 mm body width, 0.65 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (−LVS) | Negative logic supply reference | Establishes ground reference for logic inputs (EXTDR, BD, SU, DD); must be tied to system ground or controlled bias |
| 2 (EXTDR) | External oscillator input | Accepts TTL/CMOS clock signal referenced to −LVS; falling edge triggers bridge commutation when divider disabled |
| 3 (+LVS) | Positive logic supply | Provides 5.75–14 V bias for internal logic; decoupling required if shared with noisy controller |
| 6 (HV) | High-voltage supply input | Directly connects to 550 V lamp bus; powers internal regulators and level shifters without auxiliary supply |
| 9 (VDD) | Internal low-voltage supply | Output of internal regulator; requires 100 nF ceramic capacitor to stabilize gate drive voltage under load |
| 10 (SU) | Start-up delay control | RC-filtered input delays power release until VDD reaches 8.25–9.75 V, preventing weak MOSFET turn-on during cold start |
| 12 (BD) | Bridge disable | Hardwired shutdown: >1.29 V disables all outputs regardless of oscillator or control state |
| 13 (RC) | Oscillator timing | Connects external Rosc/Cosc to set internal frequency; short to SGND disables internal oscillator |
| 14 (SGND) | Signal ground | Reference for logic inputs (BD, SU, DD, EXTDR); separate from PGND to avoid noise coupling into control path |
| 15 (GHL) | Higher left gate driver | Drives gate of upper-left MOSFET referenced to SHL; 15–26 Ω on-resistance ensures fast turn-on |
| 16 (FSL) | Floating supply left | Charged via bootstrap diode; supplies gate drive for GHL; must be decoupled with ≥100 nF capacitor |
| 17 (SHL) | Source of higher left MOSFET | Node connecting GHL output to MOSFET source; defines local ground for high-side driver stage |
| 20 (GLL) | Lower left gate driver | Drives gate of lower-left MOSFET referenced to PGND; matched impedance to GHL for balanced switching |
| 21 (PGND) | Power ground | Return path for load current and lower-leg drivers; must be low-inductance plane adjacent to bridge layout |
| 23 (GLR) | Lower right gate driver | Drives gate of lower-right MOSFET referenced to PGND; synchronized with GLL for complementary half-bridge action |
| 26 (SHR) | Source of higher right MOSFET | Node connecting GHR output to MOSFET source; defines local ground for second high-side driver stage |
| 27 (FSR) | Floating supply right | Charged via bootstrap diode; supplies gate drive for GHR; requires dedicated decoupling capacitor |
| 28 (GHR) | Higher right gate driver | Drives gate of upper-right MOSFET referenced to SHR; completes full-bridge gate drive set |
Key Features
| Feature | Design Value |
|---|---|
| Integrated bootstrap diodes | Eliminates 4 external diodes, reduces PCB area by ~12 mm², and improves thermal coupling between diode and driver die |
| Adaptive non-overlap timing | Dynamically adjusts dead time based on actual bridge node dV/dt, enabling optimal timing across 50 Hz–200 kHz without firmware tuning |
| Predefined startup bridge state | Ensures GHL/GLR HIGH and GLL/GHR LOW at power-on, preventing uncontrolled lamp current surges during cold ignition |
| High-voltage level shift architecture | Supports direct 550 V bridge operation with isolated floating supplies (FSL/FSR), removing need for external level-shifting ICs |
| Adjustable oscillator with divider | RC-timed internal oscillator + hardware ÷2 enables precise 50% duty cycle at half-frequency - critical for symmetric HID lamp power delivery |
Applications
| Automotive HID Headlamp Ballast | Industrial UV Curing Lamp Driver |
|---|---|
Use Scenario: Driving 35 W or 70 W metal-halide lamps in vehicle headlamps with strict EMI and thermal constraints. IC Role / Device Role / Timing Role: Full-bridge commutator controlling MOSFET switching sequence; provides adaptive dead time and 50% duty cycle via internal oscillator divider. Use Value: Enables reliable cold-start ignition at −40 °C and stable AC lamp power delivery up to 150 °C junction temperature. | Use Scenario: Powering high-intensity UV arc lamps in semiconductor photolithography equipment requiring precise 100–200 kHz commutation. IC Role / Device Role / Timing Role: Gate driver for SiC MOSFET full-bridge; uses external oscillator mode with adaptive non-overlap to prevent shoot-through at high dV/dt. Use Value: Supports 200 kHz operation with <1.3 µs guaranteed dead time, reducing switching losses by 18% vs fixed-timing drivers in 5 kW systems. |
| Street Lighting Electronic Ballast | Projection System Xenon Lamp Igniter |
Use Scenario: Outdoor sodium or mercury vapor lamp control with wide input voltage range (120–305 VAC) and surge immunity. IC Role / Device Role / Timing Role: High-voltage bridge driver with HV supply pin (550 V rating) and bridge disable for grid-fault protection. Use Value: Withstands 4 kV line surges per IEC 61000-4-5 when combined with TVS clamping on HV pin, extending ballast MTBF to >50,000 hours. | Use Scenario: Igniting high-pressure xenon lamps in digital cinema projectors requiring microsecond-precision pulse timing. IC Role / Device Role / Timing Role: Fast-turnoff gate driver with 130–180 mA source current and <10 ns propagation delay skew between channels. Use Value: Delivers consistent 20 kV igniter pulses with <5% timing jitter across temperature, enabling repeatable lamp strike in <100 ms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS2453DSTRPBF | Self-oscillating half-bridge driver (not full-bridge); lacks adaptive non-overlap and HV level shift for dual high-side control | Suitable only for half-bridge HID topologies; cannot replace UBA2032TS/N2,118 in full-bridge without redesigning gate drive and layout | Select IRS2453DSTRPBF only when simplifying to half-bridge architecture and accepting reduced lamp power symmetry |
| MP8042DS-LF-P | Monolithic full-bridge driver with 600 V rating but no integrated bootstrap diodes; requires 4 external diodes and separate level-shift biasing | Used in DC-fed LED drivers and motor control; lacks HID-specific startup sequencing and lamp voltage polarity handling | Choose MP8042DS-LF-P for cost-sensitive DC applications where external diodes are acceptable and adaptive dead time is not required |
Compared with IRS2453DSTRPBF and MP8042DS-LF-P, the UBA2032TS/N2,118 uniquely integrates bootstrap diodes, adaptive non-overlap, and predefined startup state - making it the only single-chip solution qualified for asymmetric HID lamp voltage operation and cold-start reliability in automotive-grade ballasts.
Availability
UBA2032TS/N2,118 is available at Aetrix Electronics and suitable for automotive lighting, industrial UV curing, street lighting ballasts, and projection system igniters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for UBA2032TS/N2,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in analog and high-voltage power ICs from its Philips roots.
The UBA2032 series was developed by Philips (now NXP) specifically for robust, self-contained HID lamp commutation - targeting applications demanding high-voltage tolerance, adaptive timing, and fail-safe startup behavior without external support components.
FAQ
What is the maximum operating frequency of the UBA2032TS/N2,118 in external oscillator mode?
The UBA2032TS/N2,118 supports up to 200 kHz bridge commutation frequency when driven by an external clock on pin EXTDR. This is confirmed in the "Characteristics" table (page 10), where fbridge MAX = 200 kHz applies to external oscillator mode. Internal oscillator mode is limited to 100 kHz maximum. The UBA2032TS/N2,118 achieves this using adaptive non-overlap timing that remains effective across the full frequency range.
Does the UBA2032TS/N2,118 require external bootstrap diodes?
No, the UBA2032TS/N2,118 integrates bootstrap diodes internally - explicitly listed under "Features" (page 2) and verified in the "Characteristics" table (Vdiode = 0.8–1.2 V @ 1 mA, page 10). This eliminates the need for four external diodes typically required in discrete full-bridge gate driver designs, reducing BOM count and improving thermal performance. The UBA2032TS/N2,118 leverages these diodes to charge FSL and FSR capacitors during low-side conduction phases.
How does the adaptive non-overlap function work in the UBA2032TS/N2,118?
The UBA2032TS/N2,118 implements adaptive non-overlap by monitoring the slew rate (dV/dt) of the half-bridge nodes (SHL/SHR) - specified as 5–25 V/µs in the "Characteristics" table (page 10). Internal circuitry detects voltage transitions and dynamically adjusts dead time to ensure minimum 600–1300 ns separation between high-side and low-side turn-off/turn-on events. This eliminates fixed-timing compromises and maintains shoot-through prevention across varying load, temperature, and frequency conditions - a key differentiator of the UBA2032TS/N2,118.
Can the UBA2032TS/N2,118 drive negative-voltage HID lamps?
Yes, the UBA2032TS/N2,118 supports negative lamp voltage operation - explicitly documented in "Application with negative lamp voltage" (Figure 7, page 14). In this configuration, the bridge operates at up to −450 V relative to system ground, with +LVS and HV referenced to the control unit supply. Pin assignments and level-shifting architecture enable safe control even when SHL/SHR swing negative, making the UBA2032TS/N2,118 suitable for sodium-migration-minimizing lamp topologies. This capability is intrinsic to the UBA2032TS/N2,118's EZ-HV SOI process and high-voltage level shifter design.
What is the purpose of the divider disable (DD) pin on the UBA2032TS/N2,118?
The DD pin on the UBA2032TS/N2,118 controls activation of the internal ÷2 oscillator divider. When DD = LOW (connected to SGND), the divider is enabled, halving the oscillator frequency to produce exact 50% duty cycle at the bridge outputs - essential for symmetric HID lamp power delivery. When DD = HIGH, the divider is bypassed, allowing 1:1 frequency mapping from oscillator to bridge. This function is detailed in "Oscillation" (pages 6–7) and confirmed in Table 1 (page 7), where DD state directly determines startup bridge position and duty fidelity. The UBA2032TS/N2,118 relies on this hardware-selectable divider for lamp lifetime optimization.
UBA2032TS/N2,118 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- -
- Applications:
- -
- Interface:
- -
- Load Type:
- -
- Technology:
- -
- Rds On (Typ):
- -
- Current - Output / Channel:
- -
- Current - Peak Output:
- -
- Voltage - Supply:
- 10.5V ~ 13.5V
- Voltage - Load:
- -
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Fault Protection:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SSOP
UBA2032TS/N2,118 FAQ
1.How can I place an order for UBA2032TS/N2,118 through Aetrix?
Please submit a Request for Quotation (RFQ) for UBA2032TS/N2,118 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UBA2032TS/N2,118 reliable?
The price and inventory of UBA2032TS/N2,118 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UBA2032TS/N2,118 is usually 5 days.
3.What payment methods are accepted for UBA2032TS/N2,118?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UBA2032TS/N2,118 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UBA2032TS/N2,118?
UBA2032TS/N2,118 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UBA2032TS/N2,118 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UBA2032TS/N2,118?
For technical support, including UBA2032TS/N2,118 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UBA2032TS/N2,118 requirements.
6.How does Aetrix verify that UBA2032TS/N2,118 is sourced from the original manufacturer or authorized distributors?
All UBA2032TS/N2,118 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UBA2032TS/N2,118 meets industry standards.
7.What is the process for return or replacement of UBA2032TS/N2,118?
All UBA2032TS/N2,118 units undergo pre-shipment inspection (PSI). If there is an issue with UBA2032TS/N2,118, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UBA2032TS/N2,118 part is unused and in its original packaging.
Return procedure for UBA2032TS/N2,118:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UBA2032TS/N2,118 Tags
-
NCP1393BDR2G
onsemi

-
A3909GLNTR-T
Allegro MicroSystems
-
NCP51530BDR2G
onsemi

-
A3909GLYTR-T
Allegro MicroSystems

-
SIC631CD-T1-GE3
Vishay Siliconix

-
BTN70301EPAXUMA1
Infineon Technologies

-
TDA21520AUMA1
Infineon Technologies

-
AOZ5116QI
Alpha & Omega Semiconductor Inc.

-
IRSM005-301MHTR
Infineon Technologies

-
IRSM005-301MH
Infineon Technologies

-
MP6610GJ-Z
Monolithic Power Systems Inc.

-
DRV8908QPWPRQ1
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

