NXP Semiconductors BFG520/XR,235

Overview

BFG520/XR from NXP Semiconductors is an NPN silicon planar epitaxial RF transistor in SOT143R package, designed for GHz-range RF front-end amplification with 9 GHz transition frequency (f_T), 1.1 dB minimum noise figure at 900 MHz, and 19 dB maximum unilateral power gain at 900 MHz - deployed in satellite TV tuners, DECT cordless telephones, and radar detectors.

For engineers reviewing the BFG520/XR datasheet, BFG520/XR pinout, BFG520/XR application, or BFG520/XR equivalent, this page delivers verified pin configuration, real-world RF performance metrics (G_UM, F, P_L1, I_TO), thermal derating behavior, and validated alternatives for RF amplifier design in consumer and telecom infrastructure.

Technical Context

The BFG520/XR operates as a common-emitter NPN RF amplifier with gold-metallized emitter-base-collector junctions ensuring reliability under RF stress. Its dual-emitter SOT143R layout enables optimized biasing and thermal management for broadband operation up to 2 GHz.

It delivers 17 dB insertion power gain and 26 dBm third-order intercept point (I_TO) at 900 MHz under 20 mA/6 V DC bias, with noise matching achieved via Γ_opt source reflection coefficient - critical for low-noise amplifier (LNA) stages in SATV and cellular receiver front-ends.

Key Specifications

Pinout & Package

Package: SOT143R - plastic surface-mounted 4-pin package with reverse pinning (pin 1 = collector, pin 2 = emitter, pin 3 = base, pin 4 = emitter), 3.0 × 1.4 mm footprint, 1.1 mm height, thermal pad on collector tab.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF transistor applications.

Compared with BFG520/XR, BFG520/X offers identical RF performance but demands PCB re-layout due to non-reverse pinning, while MRF581 trades GHz capability for higher power handling in non-SMT form - making BFG520/XR the sole choice for space-constrained, high-frequency LNA applications.

Availability

BFG520/XR is available at Aetrix Electronics and suitable for satellite TV tuners, DECT cordless telephones, radar detectors, and fiber-optic repeater amplifiers requiring stable component supply across extended production lifecycles.

Supply support for BFG520/XR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.

The BFG520/XR belongs to NXP's legacy RF transistor product line, engineered specifically for GHz-range low-noise, high-gain amplification in compact consumer wireless devices - emphasizing reliability, gold-metallized robustness, and SMT manufacturability.

FAQ

What is the maximum operating frequency supported by the BFG520/XR?

The BFG520/XR has a typical transition frequency (f_T) of 9 GHz, with verified 13 dB maximum unilateral gain (G_UM) at 2 GHz and usable insertion gain up to 3 GHz. Its S-parameters confirm stable operation through 2 GHz under standard 20 mA/6 V bias, making it suitable for L-band and S-band RF front-ends but not recommended for sustained operation above 3 GHz where gain rolls off rapidly.

How does the dual-emitter configuration of the BFG520/XR improve RF performance?

The dual-emitter structure in the BFG520/XR enables emitter degeneration via external resistors or capacitors, improving linearity and stability without sacrificing gain. In practice, connecting one emitter to RF ground and using the other for bias allows precise control of transconductance - directly enhancing I_TO (26 dBm) and reducing second-order distortion (d₂ = −50 dB) in SATV and DECT applications.

What thermal management is required for reliable operation of the BFG520/XR?

The BFG520/XR has a thermal resistance R_{th j-s} of 290 K/W and must be mounted with its collector tab soldered to ≥25 mm² of 2-oz copper on the PCB. Derating begins at 88 °C solder point temperature (T_s); full 300 mW dissipation is only permissible below T_s = 88 °C per Figure 3 in the datasheet - exceeding this requires proportional power reduction to maintain T_j ≤ 175 °C.

Can the BFG520/XR replace the BFG520/X in an existing design?

No direct replacement is possible without PCB modification: BFG520/XR uses SOT143R (pin 1 = collector, pin 2 = emitter, pin 3 = base, pin 4 = emitter), while BFG520/X uses SOT143B (pin 1 = collector, pin 2 = base, pin 3 = emitter, pin 4 = emitter). The reversed base/emitter pins mean routing changes are mandatory - though RF performance, thermal specs, and package dimensions are identical between the two variants.

What is the recommended bias condition for minimum noise figure in the BFG520/XR?

For minimum noise figure (F_min = 1.1 dB), the BFG520/XR must be biased at I_C = 5 mA and V_CE = 6 V, with source impedance matched to Γ_opt = 0.42∠−120° (50 Ω system). This condition is documented in Figure 15 of the datasheet and requires external matching network tuning - deviating to 20 mA increases F to 1.6 dB but improves gain and linearity for driver-stage use.