Nexperia USA Inc. NHUMB1X

Overview

NHUMB1 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363 (SC-88) package, designed for digital switching and IC input control. It features 80 V collector-emitter breakdown voltage, 100 mA output current per transistor, built-in 22 kΩ base resistors (R1 = R2), and AEC-Q101 qualification for automotive-grade reliability.

For engineers reviewing the NHUMB1 datasheet, NHUMB1 pinout, NHUMB1 application, or NHUMB1 equivalent, this device serves as a space- and cost-optimized replacement for discrete dual-transistor solutions in low-power logic interface and load switching circuits where simplified biasing and reduced BOM count are critical.

Technical Context

This dual PNP RET integrates two matched PNP transistors with identical on-chip bias resistors (R1 = R2 = 22 kΩ), enabling direct TTL/CMOS-level input drive without external base resistors. Each transistor supports −80 V V_CEO, −100 mA I_O, and exhibits h_FE ≥ 70 at V_CE = −5 V, I_C = −10 mA.

The device operates across −55 °C to +150 °C ambient, with thermal resistance R_th(j-a) = 358 K/W (per device on FR4 PCB), and delivers V_CE(sat) ≤ −100 mV at I_C = −10 mA / I_B = −0.5 mA - confirming robust saturation under standard logic-drive conditions.

Key Specifications

Pinout & Package

SOT363 (SC-88) surface-mount plastic package: 6-pin, 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, rated for reflow and wave soldering per JEDEC standards.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual PNP switching applications.

Compared with NHUMB11 and NHUMB2, NHUMB1 strikes a balance between base drive efficiency (22 kΩ), gain (h_FE ≥ 70), and saturation performance (V_CE(sat) ≤ −100 mV), making it optimal for general-purpose 3.3 V/5 V logic-controlled switching where both current capability and power efficiency matter.

Availability

NHUMB1 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O modules, and consumer appliance control boards requiring stable component supply and AEC-Q101 compliance.

Supply support for NHUMB1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions optimized for efficiency and miniaturization.

NHUMB1 belongs to the resistor-equipped transistor (RET) product line, engineered specifically to reduce design complexity and bill-of-materials cost in digital interface and load-switching applications across automotive and industrial markets.

FAQ

What is the maximum operating junction temperature for NHUMB1?

The absolute maximum junction temperature (T_j) is 150 °C, as specified in Table 6 (Limiting values). This rating is maintained under continuous operation with proper PCB thermal design - e.g., using FR4 with single-sided copper and standard SOT363 footprint per Figure 1, where P_tot derates linearly above 25 °C ambient.

Can NHUMB1 replace BC856-based dual-transistor circuits without redesign?

Yes - NHUMB1 provides functional equivalence to two BC856 transistors with external 22 kΩ base resistors. Its pinout (GND1/I1/O2/GND2/I2/O1) matches typical dual-transistor layouts, and its built-in resistors eliminate four passives while maintaining identical DC switching behavior and gain characteristics at I_C = −10 mA.

Is NHUMB1 suitable for 3.3 V logic interfacing?

Yes - VI(on) is −2.3 V (typical) at V_CE = −0.3 V and I_C = −10 mA, ensuring full saturation when driven by 3.3 V CMOS outputs (which swing to ≥ 3.0 V high). VI(off) is −1.15 V (min), providing noise margin against false triggering in noisy environments.

How does the thermal resistance differ between per-transistor and per-device ratings?

Per-transistor R_th(j-a) is 532 K/W; per-device (both transistors sharing one package) is 358 K/W. The lower per-device value reflects shared heat dissipation through the common lead frame and mold compound - meaning total power handling improves when both transistors operate simultaneously within the 350 mW device limit.