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Nexperia USA Inc. PUMD9,115
- Part No.:
- PUMD9,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD9,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:42,439
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Product details
Overview
PUMD9 from Nexperia is an NPN/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for 50 V VCEO, 100 mA output current per transistor, with built-in bias resistors R1 = 10 kΩ and R2 = 47 kΩ. It functions as a dual-channel digital switch for level translation and IC input control in compact automotive and industrial PCBs.
For engineers reviewing the PUMD9 datasheet, PUMD9 pinout, PUMD9 application, or PUMD9 equivalent, this device serves as a space- and BOM-optimized replacement for discrete BC847/BC857 pairs in low-power switching, load control, and logic interface circuits where thermal derating to 300 mW at 25 °C ambient must be considered.
Technical Context
The PUMD9 integrates two complementary silicon transistors - TR1 (NPN) and TR2 (PNP) - each with monolithically embedded base bias networks. TR1 features hFE ≥ 100 at IC = 5 mA and VCE = 5 V; TR2 delivers matching gain performance under negative-polarity conditions.
Its internal R1–R2 network sets fixed input impedance (10 kΩ) and bias ratio (4.7), enabling direct TTL/CMOS-level drive without external resistors. The device operates across –65 °C to +150 °C ambient, with junction-to-ambient thermal resistance of 417 K/W (per device) on standard FR4 PCB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage before breakdown; enables use in 24 V automotive and industrial supply rails. |
| IO | 100 mA - Continuous output current per transistor; supports driving LEDs, small relays, or logic inputs without external current limiting. |
| R1 | 10 kΩ - Fixed input bias resistor; sets base current for predictable turn-on with 3.3 V/5 V logic without calculation or layout overhead. |
| R2/R1 | 4.7 - Optimized bias ratio ensuring stable saturation (VCE(sat) ≤ 100 mV) across temperature and process variation. |
| Ptot | 300 mW - Total device power dissipation at Tamb = 25 °C; defines maximum combined switching loss for both transistors in thermally constrained layouts. |
| fT (TR1) | 230 MHz - Transition frequency of NPN transistor; supports high-speed digital switching up to ~10–20 MHz with minimal propagation delay. |
| Cc (TR2) | 3 pF - Collector capacitance of PNP transistor; limits high-frequency crosstalk and ensures clean edge integrity in mixed-signal routing. |
Pinout & Package
SOT363-3 (TSSOP6) plastic surface-mounted package: 1.35 mm × 2.2 mm footprint, 0.65 mm pitch, 0.95 mm max height; optimized for reflow soldering with defined wave and reflow footprints per Figure 20/21.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference node for first channel's current path. |
| 2 | I1 | Base input for TR1 (NPN); driven directly by microcontroller GPIO or logic gate with no series resistor required. |
| 3 | O2 | Collector output for TR2 (PNP); sinks current when TR2 is active; used for high-side or inverted logic switching. |
| 4 | GND2 | Emiter connection for TR2 (PNP); independent ground return for second channel, enabling dual-rail or isolated switching. |
| 5 | I2 | Base input for TR2 (PNP); accepts negative-going or open-collector signals; compatible with standard CMOS/TTL low-active outputs. |
| 6 | O1 | Collector output for TR1 (NPN); sources current when TR1 is active; used for low-side switching or pull-down functions. |
Key Features
| Feature | Design Value |
|---|---|
| Dual NPN/PNP topology | Enables complementary switching in single package - e.g., push-pull drivers or H-bridge half-control without cross-conduction risk. |
| Built-in R1/R2 bias network | Eliminates four external resistors per pair, reducing PCB area by >30% and eliminating placement errors in high-volume SMT assembly. |
| 100 mA per transistor rating | Supports direct drive of optocoupler LEDs, small solenoids, or logic buffers without additional driver stages. |
| 417 K/W Rth(j-a) (device) | Allows full 300 mW power handling on standard FR4 with 35 μm copper, simplifying thermal design for space-constrained modules. |
| –65 °C to +150 °C operation | Validated for under-hood automotive and factory-floor industrial environments without derating below –40 °C. |
Applications
| Automotive Body Control Module | Industrial PLC Input Conditioning |
|---|---|
|
Use Scenario: Level-shifting and debouncing of mechanical switch inputs in door latch or seat position sensors. IC Role / Device Role / Timing Role: Dual RET acts as bidirectional signal conditioner - TR1 pulls low on switch closure, TR2 pulls high on release, eliminating need for external pull-ups/pull-downs. Use Value: Reduces component count by 4 resistors and 2 discrete transistors per channel, cutting BOM cost and improving long-term reliability against solder joint fatigue. |
Use Scenario: Converting 24 V DC field sensor outputs to 3.3 V logic levels for ARM-based controller inputs. IC Role / Device Role / Timing Role: TR2 (PNP) provides high-side interface for sinking 24 V signals; TR1 (NPN) drives downstream logic with fast VCE(sat) ≤ 100 mV. Use Value: Achieves <50 ns propagation delay with integrated biasing, avoiding timing skew between channels seen in discrete resistor-transistor solutions. |
| Consumer Appliance Motor Driver Enable | Medical Diagnostic Instrument Signal Gating |
|
Use Scenario: Enabling/disabling brushed DC motor drivers in smart HVAC actuators using MCU GPIO. IC Role / Device Role / Timing Role: TR1 switches motor driver enable line low; TR2 controls fault feedback line high - both synchronized via shared MCU port pins. Use Value: Enables dual-function control from one 2-pin GPIO port, freeing MCU resources while maintaining IEC 61000-4-2 ESD robustness (±8 kV contact). |
Use Scenario: Gating analog sensor signals during ADC sampling to prevent leakage-induced offset drift. IC Role / Device Role / Timing Role: TR1 (NPN) shorts unused signal paths to ground; TR2 (PNP) isolates reference voltage nodes during conversion cycles. Use Value: Delivers <1 nA leakage (ICEO ≤ 5 µA at 150 °C) ensuring sub-LSB accuracy in 16-bit medical-grade data acquisition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMH9 | NPN/NPN configuration; identical R1/R2 values and SOT363-3 package; lacks PNP channel. | Suitable only for dual low-side switching; cannot replace PUMD9 in push-pull or level-inverting roles. | Select when both channels require sourcing capability and polarity matching is critical. |
| PUMB9 | PNP/PNP configuration; same package and bias network; no NPN channel. | Limited to dual high-side or sinking applications; incompatible with ground-referenced loads. | Choose for redundant safety shutdown paths or dual-sink configurations in fail-safe systems. |
Compared with PUMH9 and PUMB9, the PUMD9 uniquely supports complementary signal routing in one footprint - essential for bidirectional interfaces, bus termination, and mixed-polarity control where channel pairing reduces interconnect complexity and improves timing alignment.
Availability
PUMD9 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O modules, and medical diagnostic equipment requiring stable component supply and long-lifecycle support through 2030.
Supply support for PUMD9 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.
The PUMD9 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce bill-of-materials count and improve assembly yield in cost-sensitive, space-constrained digital interface applications.
FAQ
What is the maximum operating temperature for continuous use?
The PUMD9 is rated for continuous operation from –65 °C to +150 °C ambient temperature. Its junction temperature must not exceed 150 °C; at 25 °C ambient, full 300 mW power dissipation is allowed, derating linearly to zero at 150 °C ambient per the 417 K/W thermal resistance curve.
Can PUMD9 replace BC847/BC857 pairs without circuit modification?
Yes - the PUMD9 replaces one BC847 (NPN) and one BC857 (PNP) with identical pin-compatible functionality in SOT363-3. Its built-in 10 kΩ/47 kΩ bias network eliminates four external resistors, and its 100 mA rating matches the BC847/BC857 family's continuous current capability.
How does the R2/R1 ratio affect switching behavior?
The R2/R1 ratio of 4.7 ensures sufficient base current to drive each transistor into deep saturation (VCE(sat) ≤ 100 mV) across temperature and process variation. This ratio prevents partial turn-on states that cause excessive power dissipation or logic ambiguity in digital switching applications.
Is PUMD9 qualified for automotive applications?
No - the PUMD9 is not AEC-Q101 qualified. While it operates across –65 °C to +150 °C and is used in automotive body electronics, Nexperia explicitly states in its legal disclaimers that non-automotive-qualified products are not warranted for safety-critical or under-hood applications without customer validation.
PUMD9,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 10kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD9,115 FAQ
1.How can I place an order for PUMD9,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD9,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD9,115 reliable?
The price and inventory of PUMD9,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD9,115 is usually 5 days.
3.What payment methods are accepted for PUMD9,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD9,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD9,115?
PUMD9,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD9,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD9,115?
For technical support, including PUMD9,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD9,115 requirements.
6.How does Aetrix verify that PUMD9,115 is sourced from the original manufacturer or authorized distributors?
All PUMD9,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD9,115 meets industry standards.
7.What is the process for return or replacement of PUMD9,115?
All PUMD9,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD9,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD9,115 part is unused and in its original packaging.
Return procedure for PUMD9,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD9,115 Tags
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SMUN5311DW1T1G
onsemi
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UMH9NTN
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