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Nexperia USA Inc. PUMD3,115
- Part No.:
- PUMD3,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD3,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:226,633
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Product details
Overview
PUMD3,115 from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (TSSOP6) package, with built-in 10 kΩ input bias resistors (R1 = R2 = 10 kΩ), 50 V VCEO, 100 mA output current per transistor, and optimized for digital switching in space-constrained automotive and industrial control circuits.
For engineers reviewing the PUMD3,115 datasheet, PUMD3,115 pinout, PUMD3,115 application, or PUMD3,115 equivalent, this device serves as a drop-in replacement for discrete BC847/BC857 pairs in level-shifting, IC input control, and low-power load switching - where reduced BOM count, simplified layout, and consistent biasing are critical.
Technical Context
The PUMD3,115 integrates two complementary transistors on one die: TR1 (NPN) and TR2 (PNP), each with monolithically embedded base bias resistors (R1 and R2). Its dual-polarity configuration enables push-pull or complementary switching without external bias networks.
Each transistor operates independently with verified DC current gain (hFE ≥ 30 at IC = 5 mA, VCE = 5 V), collector-emitter saturation voltage ≤ 100 mV at IC/IB = 20, and transition frequencies of 230 MHz (TR1) and 180 MHz (TR2), supporting high-speed digital switching up to ~50 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage before breakdown; supports 24 V industrial bus and 12 V automotive logic interfacing. |
| IO | 100 mA - Continuous output current per transistor; sufficient for driving LEDs, small relays, or logic inputs without external amplification. |
| R1 / R2 | 10 kΩ ±30% - Integrated base bias resistors eliminate need for two external resistors per transistor, reducing PCB area by ≥30% vs discrete solutions. |
| VCE(sat) | ≤100 mV at IC = 10 mA, IB = 0.5 mA - Ensures low conduction loss and minimal self-heating during sustained switching. |
| fT (TR1/TR2) | 230 MHz / 180 MHz - Enables reliable operation in digital signal paths up to 50 MHz with stable gain margin. |
| Package | SOT363-3 (TSSOP6) - 2.2 mm × 1.35 mm footprint with 0.65 mm pitch; compatible with standard reflow soldering and automated placement. |
Pinout & Package
SOT363-3 (TSSOP6) plastic surface-mounted package with 6 leads, 0.65 mm lead pitch, and exposed pad not present; rated for operation from −65 °C to +150 °C ambient.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference node for first transistor's current path. |
| 2 | I1 | Base input for TR1 (NPN); internally connected to R1; accepts TTL/CMOS-compatible logic-level drive. |
| 3 | O2 | Collector output for TR2 (PNP); active-low switching node with 50 V blocking capability. |
| 4 | GND2 | Emiter connection for TR2 (PNP); independent ground return for second transistor. |
| 5 | I2 | Base input for TR2 (PNP); internally connected to R2; enables complementary control with inverted logic polarity. |
| 6 | O1 | Collector output for TR1 (NPN); active-high switching node; used for sourcing current to loads. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated R1/R2 bias network | Eliminates 4 external resistors in dual-transistor switch designs, cutting component count and assembly cost. |
| NPN/PNP complementarity | Enables true push-pull output stages without cross-coupling or level-shifter ICs in microcontroller GPIO expansion. |
| 100 mA per transistor rating | Supports direct drive of optocouplers, small solenoids, and logic buffers without additional driver stages. |
| Low VCE(sat) (≤100 mV) | Reduces power dissipation to <10 mW at 10 mA load, enabling use in thermally constrained modules. |
Applications
| Automotive Body Control Module | Industrial PLC Digital Output |
|---|---|
|
Use Scenario: Driving LED status indicators and small solenoid valves in door module ECUs. IC Role / Device Role / Timing Role: Dual-polarity switch translating MCU GPIO signals into isolated 12 V load control with polarity inversion. Use Value: Reduces board area by 2.5 mm² vs discrete BC847+BC857 pair and eliminates 4 passive components per channel. |
Use Scenario: Providing isolated 24 V digital outputs for sensor interface cards in modular PLC backplanes. IC Role / Device Role / Timing Role: Level-shifting and current-boosting stage between FPGA I/O banks and field-side loads. Use Value: Maintains <100 ns propagation delay while supporting 100 mA sink/source per channel without thermal derating. |
| Consumer Appliance UI Panel | Medical Diagnostic Instrument I/O |
|
Use Scenario: Controlling backlight dimming and tactile feedback buzzers in smart home appliance control panels. IC Role / Device Role / Timing Role: Complementary switch managing both high-side (PNP) and low-side (NPN) loads from a single 3.3 V microcontroller port. Use Value: Enables bidirectional load control using only two MCU pins instead of four, simplifying firmware GPIO mapping. |
Use Scenario: Isolating microcontroller I/O from relay drivers and analog multiplexer enable lines in portable diagnostic devices. IC Role / Device Role / Timing Role: Signal conditioning and current gain stage ensuring noise-immune switching in low-power battery-operated systems. Use Value: Delivers 100 mA drive capability with <1 µA standby leakage, extending battery life in always-on monitoring modes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMH11 | NPN/NPN configuration; identical R1/R2 values and package; no PNP element. | Limited to high-side or parallel NPN switching; cannot implement true complementary output. | Select when dual NPN drive (e.g., two anode-controlled LEDs) is required without polarity inversion. |
| PUMB11 | PNP/PNP configuration; same bias resistors and package; no NPN element. | Suitable only for dual low-side sinking; lacks sourcing capability for active-high loads. | Choose for dual-sink applications like multiple gate drivers or open-collector bus termination. |
Compared with PUMH11 and PUMB11, the PUMD3,115 uniquely delivers matched NPN/PNP functionality in one package - enabling true push-pull operation, bidirectional level translation, and reduced interconnect complexity where complementary switching is mandatory.
Availability
PUMD3,115 is available at Aetrix Electronics and suitable for automotive body electronics, industrial programmable logic controllers, consumer appliance control panels, and medical diagnostic instrument I/O requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PUMD3,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-performance, energy-efficient logic, discrete, and MOSFET solutions, with manufacturing rooted in process innovation and automotive-grade reliability standards.
The PUMD3,115 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace discrete BJT-resistor combinations in digital interface and load-switching applications - prioritizing miniaturization, assembly efficiency, and parametric consistency.
FAQ
What is the maximum operating temperature for PUMD3,115?
The PUMD3,115 has a specified junction temperature limit of 150 °C and an ambient operating range of −65 °C to +150 °C. Its thermal resistance (Rth(j-a)) is 417 K/W per device on FR4 PCB, allowing full 100 mA operation up to +85 °C ambient with standard layout.
Can PUMD3,115 replace BC847 and BC857 simultaneously in a circuit?
Yes - the integrated NPN (TR1) and PNP (TR2) transistors match the electrical characteristics of BC847 (NPN) and BC857 (PNP), including VCEO = 50 V, IC = 100 mA, and hFE ≥ 30. Its built-in 10 kΩ bias resistors replicate typical base-drive configurations used with those discretes.
Is the SOT363-3 package compatible with standard TSSOP6 footprints?
Yes - the SOT363-3 (also labeled TSSOP6) has standardized dimensions: 2.2 mm × 1.35 mm body, 0.65 mm lead pitch, and 6-pin layout matching JEDEC MO-178AB. Reflow soldering footprints in Figure 20 of the datasheet are validated for compatibility with industry-standard stencil and placement equipment.
Does PUMD3,115 support 3.3 V logic-level drive?
Yes - VI(on) is 1.8 V (typ) for TR1 and −1.8 V (typ) for TR2 at IC = 10 mA, ensuring reliable turn-on from 3.3 V CMOS outputs. VI(off) is 0.8 V (typ) for TR1 and −0.8 V (typ) for TR2, providing noise margin against false triggering in noisy environments.
PUMD3,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 10kOhms
- Resistor - Emitter Base (R2):
- 10kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD3,115 FAQ
1.How can I place an order for PUMD3,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD3,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD3,115 reliable?
The price and inventory of PUMD3,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD3,115 is usually 5 days.
3.What payment methods are accepted for PUMD3,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD3,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD3,115?
PUMD3,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD3,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD3,115?
For technical support, including PUMD3,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD3,115 requirements.
6.How does Aetrix verify that PUMD3,115 is sourced from the original manufacturer or authorized distributors?
All PUMD3,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD3,115 meets industry standards.
7.What is the process for return or replacement of PUMD3,115?
All PUMD3,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD3,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD3,115 part is unused and in its original packaging.
Return procedure for PUMD3,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD3,115 Tags
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SMUN5311DW1T1G
onsemi
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UMH9NTN
Rohm Semiconductor
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PUMH13,115
Nexperia USA Inc.
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PUMH9,115
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DCX114EU-7-F
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