Nexperia USA Inc. PBLS2004D,115

Overview

PBLS2004D,115 from NXP Semiconductors (formerly Philips Semiconductors) is a dual-function SOT457-packaged discrete device integrating a PNP low-V_CEsat Breakthrough in Small Signal (BISS) transistor and an NPN resistor-equipped transistor (RET). It delivers −1 A DC collector current (TR1), 185–280 mΩ R_CEsat at −1 A/−100 mA drive, and built-in bias resistors (R1 = 22 kΩ typ, R2/R1 = 1.0). It serves as a high-side load switch in portable equipment power rails and LED backlight control.

For engineers reviewing the PBLS2004D,115 datasheet, PBLS2004D,115 pinout, PBLS2004D,115 application, or PBLS2004D,115 equivalent, key selection criteria include verified dual-transistor integration, guaranteed R_CEsat ≤ 280 mΩ under −1 A load, confirmed 6-pin SOT457 footprint, and documented thermal resistance of 236 K/W on FR4 with collector pad - all critical for compact battery-powered load switching designs.

Technical Context

The PBLS2004D integrates two functionally independent transistors: TR1 is a PNP BISS device optimized for low-saturation operation (V_CEsat = −185 to −280 mV at −1 A/−100 mA), while TR2 is an NPN RET with integrated input bias network (R1 = 15.4–28.6 kΩ, R2/R1 = 0.8–1.2). Both share thermally coupled die but operate with separate electrical paths and distinct absolute maximum ratings: TR1 supports −20 V V_CEO, TR2 supports +50 V V_CEO.

Switching performance is characterized with defined test conditions: t_d = 8 ns, t_r = 34 ns, t_off = 185 ns at −1 A load and −50 mA base drive. Thermal design must account for per-device P_tot limits: 350 mW (FR4 standard), 400 mW (FR4 with 1 cm² collector pad), or 600 mW (ceramic Al₂O₃).

Key Specifications

Pinout & Package

SOT457 (SC-74) 6-lead surface-mount plastic package: 3.0 mm × 2.5 mm × 1.3 mm body, 0.95 mm pin pitch, gull-wing leads. Pin 1 index located at top-left corner when marking side faces up and notch/polarity indicator oriented left.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-transistor load switching applications.

Compared with NSBC114EDXV6T1G and DMN3028LSD-13, PBLS2004D,115 uniquely combines high-side PNP switching with NPN RET logic interface in one package - eliminating four external components while supporting 1 A loads and 1.8 V logic compatibility, making it optimal for tightly integrated portable power architectures.

Availability

PBLS2004D,115 is available at Aetrix Electronics and suitable for battery charger switches, LED backlight high-side control, and portable equipment power rail switching requiring stable component supply across production lifecycles.

Supply support for PBLS2004D,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with roots in Philips' pioneering analog and discrete transistor development.

PBLS2004D,115 belongs to NXP's legacy BISS/RET discrete portfolio, designed specifically for space-constrained portable electronics requiring integrated high-side switching and logic-compatible interface in minimal footprint.

FAQ

What is the maximum continuous current the PBLS2004D,115 can switch in high-side configuration?

The PBLS2004D,115 PNP BISS transistor (TR1) supports −1 A DC collector current at T_amb ≤ 25 °C with appropriate PCB copper area. At higher ambient temperatures or reduced copper, derating applies: e.g., 500 mA at 70 °C ambient with standard FR4 layout. Peak pulsed current is −2 A for ≤300 µs pulses.

Can the NPN RET section (TR2) drive a 10 kΩ load directly?

Yes - TR2 delivers up to 100 mA output current and supports VI(off) ≤ 0.8 V and VI(on) ≥ 1.7 V, enabling direct interfacing with 3.3 V or 5 V logic inputs. With its internal R1/R2 network, it sinks current into a 10 kΩ pull-up without external components, providing clean digital-level signaling.

Is the PBLS2004D,115 RoHS compliant and halogen-free?

Yes - PBLS2004D,115 conforms to EU RoHS Directive 2011/65/EU and is halogen-free per IEC 61249-2-21. The SOT457 package uses lead-free matte tin plating, and material declarations confirm absence of brominated flame retardants and chlorine-based compounds.

How does thermal performance differ between FR4 and ceramic PCB mounting?

On FR4 with 1 cm² collector pad, R_th(j-a) is 236 K/W (P_tot = 400 mW); on Al₂O₃ ceramic, it improves to 210 K/W (P_tot = 600 mW). This 26 K/W reduction lowers junction temperature by ~10.5 °C at 400 mW dissipation - critical for sustained 1 A operation in thermally demanding environments.