Nexperia USA Inc. PEMD15,115
- Part No.:
- PEMD15,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- SOT-563, SOT-666
- Datasheet:
-
PEMD15,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP SOT666
- Quantity:
- Payment:

- Shipping:

Inventory:4,135
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Product details
Overview
PEMD15 from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP silicon bipolar transistor with built-in bias resistors (R1 = R2 = 4.7 kΩ) in a single SOT666 package. It delivers 100 mA per transistor, supports ±50 V collector-emitter breakdown voltage, and serves as a compact logic-level interface driver for bidirectional signal control in space-constrained digital systems.
For engineers reviewing the PEMD15 datasheet, PEMD15 pinout, PEMD15 application, or PEMD15 equivalent, this device is selected for low-current peripheral interfacing where reduced component count, simplified base-drive design, and dual-polarity switching capability are required - especially in I/O expansion, level translation, and discrete logic replacement circuits.
Technical Context
The PEMD15 implements two independent bipolar transistors - TR1 (NPN) and TR2 (PNP) - each with monolithically integrated input bias resistors (R1, R2), eliminating external base resistors. Its dual-polarity configuration enables complementary switching without cross-coupling, supporting push-pull or inverter-style operation in digital logic stages.
Each transistor operates with verified DC current gain (hFE ≥ 30 at IC = 10 mA), saturation voltage ≤ 150 mV at IC/IB = 20, and transition frequencies of 230 MHz (NPN) and 180 MHz (PNP), confirming suitability for medium-speed digital switching up to ~50 MHz clock domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage per transistor under open-base conditions; defines rail compatibility with 3.3 V, 5 V, and 24 V logic interfaces. |
| IO | 100 mA - Continuous output current per transistor; sufficient to drive LEDs, small relays, MOSFET gates, or CMOS/TTL inputs directly. |
| R1 / R2 | 4.7 kΩ ±23% - Integrated base-input resistors simplify PCB layout and eliminate two external components per channel; ratio R2/R1 = 1.0 ±20% ensures matched biasing. |
| hFE | ≥30 - Minimum DC current gain at VCE = 5 V, IC = 10 mA; guarantees reliable saturation with standard microcontroller GPIO drive (e.g., 3.3 V/20 mA). |
| VCE(sat) | ≤150 mV - Collector-emitter saturation voltage at IC = 10 mA, IB = 0.5 mA; ensures <0.15 V dropout in active switching, minimizing power loss and heat generation. |
| fT | 230 MHz (NPN), 180 MHz (PNP) - Transition frequency at specified bias; confirms usable bandwidth for digital signals up to ~50 MHz with margin. |
Pinout & Package
SOT666 plastic surface-mount package: 6-pin, 0.5 mm pitch, 1.6 mm × 1.2 mm × 0.55 mm body height; ultra-small footprint optimized for high-density PCBs and automated assembly using reflow only.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection of TR1 (NPN); common reference node for first transistor's current path. |
| 2 | I1 | Base input of TR1 (NPN); accepts logic-high signal to turn on NPN switch; internally connected to R1. |
| 3 | O2 | Collector output of TR2 (PNP); provides active-low switching node when TR2 is enabled. |
| 4 | GND2 | Emiter connection of TR2 (PNP); separate ground return for second transistor, enabling independent biasing. |
| 5 | I2 | Base input of TR2 (PNP); accepts logic-low signal (or pulled low) to activate PNP switch; internally connected to R1. |
| 6 | O1 | Collector output of TR1 (NPN); provides active-high switching node when TR1 is enabled. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-polarity RET integration | Single SOT666 package contains functionally independent NPN and PNP transistors with matched internal bias resistors - reduces board area by >50% vs. discrete dual-transistor solutions. |
| Guaranteed 100 mA per channel | Rated continuous output current supports direct driving of optocouplers, small solenoids, and logic buffers without external current boosting. |
| Matched R1/R2 ratio (1.0 ±20%) | Ensures consistent input threshold behavior between NPN and PNP sections, simplifying level-shifting and complementary gate design. |
| Low VCE(sat) (≤150 mV) | Minimizes conduction loss and self-heating during sustained on-state operation, supporting stable performance at ambient temperatures up to +125 °C. |
| Thermal resistance Rth(j-a) = 417 K/W (per device) | Validated on FR4 PCB with single-sided copper; enables thermal management without heatsinking in typical 1–2 cm² layout areas. |
Applications
| LED Driver Interface | Microcontroller I/O Expander |
|---|---|
|
Use Scenario: Driving dual-color (red/green) LED indicators from a single microcontroller port pin using complementary logic. IC Role / Device Role / Timing Role: PEMD15 acts as a dual-channel level translator and current sink/source switch - TR1 sinks current for one LED, TR2 sources current for the other. Use Value: Eliminates need for four discrete resistors and two transistors; reduces BOM count by 6 components while maintaining precise current limiting via internal R1/R2. |
Use Scenario: Adding two additional GPIO-controlled outputs to an MCU with limited pins, such as in sensor hub or industrial controller designs. IC Role / Device Role / Timing Role: Functions as a compact buffer pair - TR1 provides active-high output, TR2 provides active-low output, both synchronized to the same input signal. Use Value: Enables simultaneous high-side and low-side control from one logic line, supporting legacy TTL/CMOS load requirements without timing skew or external inversion. |
| Logic-Level Translator | Discrete Gate Replacement |
|
Use Scenario: Interfacing 1.8 V FPGA I/O to 5 V peripheral logic (e.g., EEPROM, display controller) requiring bidirectional voltage adaptation. IC Role / Device Role / Timing Role: Acts as a passive translator - TR1 switches 5 V loads when FPGA drives high; TR2 pulls down 5 V lines when FPGA drives low. Use Value: Internal 4.7 kΩ resistors set defined input thresholds (~1.9 V on, ~1.1 V off), ensuring noise-immune switching across voltage domains without external bias networks. |
Use Scenario: Replacing obsolete 2N2222 + 2N2907 pairs in legacy industrial control PCBs where space and reliability are critical. IC Role / Device Role / Timing Role: Provides functionally identical NPN/PNP switching action in half the footprint, with guaranteed matching and tighter parameter tolerances. Use Value: Reduces solder joints by 4, eliminates manual resistor placement error, and improves long-term parametric stability due to monolithic resistor integration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PEMH15 | NPN/NPN configuration (no PNP section); identical R1/R2 values and SOT666 package. | Suitable only for dual-sink or parallel-output applications; cannot provide complementary sourcing/sinking. | Select when both channels require NPN topology - e.g., driving two LEDs cathode-down or two NMOS gates. |
| PEMB15 | PNP/PNP configuration; same package and bias resistor values but no NPN section. | Limited to dual-source or high-side switching; lacks active-high output capability of PEMD15's NPN. | Choose for redundant high-side control or dual PNP logic inversion where sourcing current dominates system needs. |
Compared with PEMH15 and PEMB15, the PEMD15 uniquely supports true complementary switching in one package - enabling push-pull drivers, level translators, and bidirectional I/O expansion without external logic inversion or topology mismatch.
Availability
PEMD15 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller I/O expansion, logic-level translation, and discrete gate replacement requiring stable component supply, consistent parametric performance, and long-term manufacturing continuity.
Supply support for PEMD15 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering efficient, robust, and scalable components for automotive, industrial, and consumer electronics.
The PEMD15 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce discrete count and improve assembly yield in digital interface and peripheral driver applications.
FAQ
What is the maximum operating temperature for PEMD15?
The PEMD15 has a maximum junction temperature (Tj) of 150 °C and an ambient operating range of −65 °C to +150 °C. Thermal derating begins above 25 °C ambient, with total device power dissipation dropping linearly to zero at 125 °C on FR4 PCB - confirmed by Figure 1 in the official datasheet.
Can PEMD15 replace discrete transistors in existing designs?
Yes - PEMD15 replaces two discrete transistors plus four bias resistors in NPN+PNP configurations. Pin mapping matches functional roles (O1/I1/GND1 for NPN; O2/I2/GND2 for PNP), and electrical specs (VCEO, IO, hFE) meet or exceed common general-purpose devices like BC847/BC857 pairs.
Is reflow soldering required for PEMD15?
Yes - Nexperia specifies reflow soldering as the only recommended method. The SOT666 package is not rated for wave or hand soldering. Thermal profiles must comply with JEDEC J-STD-020, and PCB land patterns must follow Figure 18 in the datasheet to ensure mechanical reliability and thermal performance.
Does PEMD15 support 1.8 V logic input levels?
Yes - VI(on) is specified at 1.9 V (typical) and 2.5 V (max) for TR1, and VI(off) is 1.1 V (typical) with 0.5 V (min), providing clear margin for 1.8 V logic high/low thresholds. Input behavior is validated across −40 °C to +100 °C per Figures 5 and 6.
PEMD15,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SOT-563, SOT-666
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 4.7kOhms
- Resistor - Emitter Base (R2):
- 4.7kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-666
PEMD15,115 FAQ
1.How can I place an order for PEMD15,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PEMD15,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PEMD15,115 reliable?
The price and inventory of PEMD15,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PEMD15,115 is usually 5 days.
3.What payment methods are accepted for PEMD15,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PEMD15,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PEMD15,115?
PEMD15,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PEMD15,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PEMD15,115?
For technical support, including PEMD15,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PEMD15,115 requirements.
6.How does Aetrix verify that PEMD15,115 is sourced from the original manufacturer or authorized distributors?
All PEMD15,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PEMD15,115 meets industry standards.
7.What is the process for return or replacement of PEMD15,115?
All PEMD15,115 units undergo pre-shipment inspection (PSI). If there is an issue with PEMD15,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PEMD15,115 part is unused and in its original packaging.
Return procedure for PEMD15,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PEMD15,115 Tags

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SMUN5311DW1T1G
onsemi

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UMH9NTN
Rohm Semiconductor

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PUMH13,115
Nexperia USA Inc.

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PUMH9,115
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DCX114EU-7-F
Diodes Incorporated

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