Nexperia USA Inc. PEMD3,115

Overview

PEMD3 from Nexperia is an NPN/PNP resistor-equipped double transistor (RET) in SOT666 package, rated for 50 V V_CEO, 100 mA output current per transistor, with built-in bias resistors R1 = R2 = 10 kΩ. It integrates complementary bipolar switching stages for digital logic interfacing and low-current peripheral driving in space-constrained PCBs.

For engineers reviewing the PEMD3 datasheet, PEMD3 pinout, PEMD3 application, or PEMD3 equivalent, this device serves as a compact, bias-resistor-integrated solution for level-shifting, IC input control, and discrete logic replacement-requiring no external base resistors and reducing BOM count in 3.3 V/5 V digital systems.

Technical Context

The PEMD3 integrates two monolithically fabricated transistors: TR1 (NPN) and TR2 (PNP), each with dedicated on-chip bias resistors (R1 = 10 kΩ, R2 = 10 kΩ) connected in standard single-resistor-base configuration. The NPN stage exhibits f_T = 230 MHz and h_FE ≥ 30 at I_C = 5 mA; the PNP stage delivers f_T = 180 MHz and comparable gain under negative-polarity conditions.

Thermal performance is specified for FR4 PCB mounting: per-device R_th(j-a) = 417 K/W, enabling 300 mW total power dissipation at T_amb ≤ 25 °C. Input voltage thresholds are characterized across temperature: VI(on) = 1.8–2.5 V (TR1), VI(off) = 0.8–1.1 V (TR1), supporting reliable TTL/CMOS-compatible switching.

Key Specifications

Pinout & Package

SOT666 plastic surface-mount package: 6-pin, 0.5 mm pitch, 1.6 mm × 1.2 mm × 0.55 mm body height; designed for high-density routing and reflow compatibility on FR4 PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Compared with PEMB11 and PEMH11, the PEMD3 uniquely enables true complementary switching in a single package-reducing component count by two transistors and four resistors versus using either alternative with external polarity inversion.

Availability

PEMD3 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, digital logic level shifting, and low-power sensor interface applications requiring stable component supply and long-term industrial availability.

Supply support for PEMD3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions optimized for efficiency, size, and manufacturability.

The PEMD3 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace general-purpose transistors in digital logic interfacing, reducing design complexity and improving assembly yield in consumer, industrial, and computing applications.

FAQ

What is the maximum ambient temperature for continuous operation of PEMD3 at full 100 mA load?

The PEMD3 is rated for continuous operation up to 150 °C junction temperature. With R_th(j-a) = 417 K/W (per device on FR4), sustained 100 mA per transistor at V_CE(sat) ≈ 150 mV yields ~30 mW dissipation per transistor (60 mW total), allowing full-load operation up to +125 °C ambient while maintaining T_j < 150 °C.

Can PEMD3 be used in automotive applications?

No. The PEMD3 is explicitly marked as non-automotive qualified in its revision history and legal disclaimers. It has not undergone AEC-Q101 stress testing or qualification for automotive temperature ranges, reliability, or failure rate requirements. Use only in industrial, consumer, or computing applications.

How does the built-in R2 resistor function in the NPN stage (TR1)?

In TR1 (NPN), R2 connects internally between base and emitter - forming a voltage divider with R1 (base-to-input). This configuration ensures predictable turn-off behavior by actively pulling the base to GND1 when the input is low, eliminating leakage-induced false turn-on and improving noise immunity over single-resistor biasing.

Is there a recommended PCB footprint for SOT666 reflow soldering?

Yes. Nexperia specifies a reflow footprint with 0.55 mm pad length (2×), 0.25 mm pad width (2×), 0.6 mm spacing (2×), and 0.65 mm spacing (2×) for thermal relief and solder joint reliability. The land pattern occupies 2.75 mm × 2.45 mm area and is optimized for standard Type 3 solder paste and peak reflow temperatures of 260 °C.