Nexperia USA Inc. PRMD3Z

Overview

PRMD3Z from Nexperia is a dual NPN/PNP resistor-equipped transistor (RET) in a DFN1412-6 (SOT1268) package, designed for compact digital switching applications. It integrates built-in bias resistors (R1 = 10 kΩ, R2/R1 = 1), supports 50 V V_CEO, delivers 100 mA per transistor output current, and is AEC-Q101 qualified for automotive-grade reliability.

For engineers reviewing the PRMD3Z datasheet, PRMD3Z pinout, PRMD3Z application, or PRMD3Z equivalent, this device serves as a space- and BOM-optimized replacement for discrete BC847/BC857 pairs in level-shifting, IC input control, and low-power load switching circuits where thermal performance (R_th(j-a) = 261 K/W per device) and ultra-thin profile (0.47 mm height) are critical.

Technical Context

The PRMD3Z integrates two complementary bipolar transistors - one NPN and one PNP - each with monolithically embedded base bias resistors. Its internal resistor network (R1 = 7–13 kΩ, R2/R1 = 0.8–1.2) enables direct logic-level drive without external biasing components.

It operates across –55 °C to +150 °C ambient, supports 325 mW per transistor and 480 mW per device power dissipation on FR4 PCB, and exhibits typical f_T of 230 MHz (NPN) and 180 MHz (PNP), confirming suitability for high-speed digital switching up to ~10 MHz toggle rates.

Key Specifications

Pinout & Package

DFN1412-6 (SOT1268) is a leadless, thermally enhanced ultra-thin plastic package measuring 1.4 mm × 1.2 mm × 0.47 mm, optimized for high-density PCB layouts and automated reflow assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual RET applications.

Compared with PRMH11 and PRMB11, PRMD3Z uniquely combines NPN and PNP in one die, enabling true complementary switching - essential for level translation, bidirectional bus control, and reduced external component count in mixed-voltage systems.

Availability

PRMD3Z is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O modules, and compact consumer display interfaces requiring stable component supply, AEC-Q101 compliance, and ultra-small footprint.

Supply support for PRMD3Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and advanced packaging.

PRMD3Z belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace discrete transistor-resistor combinations in cost-sensitive, space-constrained digital interface applications.

FAQ

What is the marking code for PRMD3Z?

The PRMD3Z is marked with "B3" on the top surface of the DFN1412-6 package, as confirmed in Section 7 of the official Nexperia datasheet. This 2-character code is laser-etched and visible under 20× magnification; it is not a date or lot code but a unique type identifier aligned with Nexperia's standardized marking system for RET devices.

Can PRMD3Z replace BC847/BC857 in existing designs without layout changes?

PRMD3Z cannot be drop-in replaced due to its 6-pin DFN1412-6 footprint versus the SOT23-6 footprint of discrete BC847/BC857 pairs. However, its integrated biasing allows removal of four external resistors, freeing PCB area that can offset the slightly larger pad layout. A minor redesign of solder mask and paste stencil is required for reflow compatibility.

Is the R2 resistor accessible for external adjustment?

No - R2 is monolithically integrated between the base and emitter of each transistor and is not externally accessible. The R2/R1 ratio is fixed at 1.0 ±0.2, and neither resistor can be modified or bypassed. Designers must rely on the specified internal values (R1 = 7–13 kΩ) for bias calculations and avoid attempts to probe or shunt internal nodes.

Does PRMD3Z support 1.8 V logic-level drive?

Yes - VI(on) is specified at 1.8 V (min) for the NPN and –1.8 V (max) for the PNP at I_C = 10 mA, confirming reliable turn-on from 1.8 V CMOS outputs. However, h_FE degrades below 2.5 V drive, so full 100 mA output is guaranteed only with ≥2.5 V logic high for NPN and ≤–2.5 V for PNP.