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Nexperia USA Inc. PUMB10,115
- Part No.:
- PUMB10,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMB10,115.pdf
- Description:
- TRANS PREBIAS 2PNP 50V 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:7,240
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Product details
Overview
PUMB10 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363 (SC-88) package, rated for −50 V VCEO, −100 mA output current per transistor, with integrated bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ. It functions as a dual-channel digital switching element for low-current logic interfacing and peripheral control in space-constrained automotive and industrial PCBs.
For engineers reviewing the PUMB10 datasheet, PUMB10 pinout, PUMB10 application, or PUMB10 equivalent, this device is selected for its AEC-Q101 qualification, built-in resistor ratio (R2/R1 = 21 typ), simplified gate-drive interface, and direct replacement capability for discrete PNP pairs in level-shifting and input conditioning circuits.
Technical Context
The PUMB10 integrates two matched PNP transistors with monolithically embedded base bias networks-R1 connects each base to its respective input, while R2 provides internal base-emitter feedback for predictable turn-on/turn-off thresholds. Each transistor operates independently with open-base VCEO = −50 V and IO = −100 mA rating.
Its thermal resistance is 417 K/W (per device, FR4 PCB), and it supports operation from −65 °C to +150 °C ambient. The VI(on) of −0.75 V (typ) and VI(off) of −0.6 V (max) enable reliable TTL- and CMOS-compatible digital control without external pull-ups or level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V - Maximum safe collector-emitter voltage with base open; defines rail-to-rail switching range in negative-supply logic interfaces |
| IO | −100 mA - Continuous DC output current per transistor; sufficient for driving LEDs, small relays, or IC inputs directly |
| R1 | 2.2 kΩ - Input bias resistor value; sets base current for predictable saturation at standard logic high levels |
| R2/R1 | 21 - Fixed internal resistor ratio; ensures stable current gain and consistent turn-off behavior across temperature |
| VCE(sat) | −100 mV - Low saturation voltage at IC = −5 mA / IB = −0.25 mA; minimizes power loss and heat generation in active switching |
| hFE | 100 - DC current gain at VCE = −5 V, IC = −10 mA; enables robust switching margin with minimal drive current |
| fT | 180 MHz - Transition frequency; supports fast digital edge rates up to ~10–20 MHz in pulse applications |
Pinout & Package
Package: SOT363 (TSSOP6), 2.1 mm × 1.25 mm × 0.95 mm body, 0.65 mm lead pitch, surface-mount plastic package compliant with JEDEC MO-178AB.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1; common reference node for first transistor's current path |
| 2 | I1 | Base input for TR1; accepts logic-level signals directly due to integrated R1 bias network |
| 3 | O2 | Collector output for TR2; active-low switching node for second channel |
| 4 | GND2 | Emiter connection for TR2; independent ground return for second transistor |
| 5 | I2 | Base input for TR2; electrically isolated from I1 but identical biasing behavior |
| 6 | O1 | Collector output for TR1; primary active-low output used in dual-driver configurations |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualified | Qualified for automotive-grade reliability including temperature cycling, HTRB, and ESD testing per AEC standard |
| Integrated R1/R2 bias network | Eliminates four external resistors per pair; reduces BOM count and layout area by >60% vs discrete PNP solutions |
| Matched dual PNP topology | Ensures consistent timing, gain, and thermal response between channels-critical for synchronized signal routing |
| Low VCE(sat) and VI(on) | Enables direct interface with 3.3 V and 5 V logic families without level-shifting circuitry or additional drivers |
| Thermal derating support | Rated 300 mW total power dissipation on FR4 PCB; supports sustained operation up to +105 °C ambient in sealed enclosures |
Applications
| Automotive Door Module Control | Industrial PLC Input Conditioning |
|---|---|
Use Scenario: Driving window lock/unlock solenoids and mirror position switches via microcontroller GPIOs with limited current drive. IC Role / Device Role / Timing Role: Dual-channel active-low switch translating MCU logic outputs into isolated 12 V load control paths. Use Value: Eliminates need for two discrete PNP transistors plus four bias resistors; reduces PCB area by 45% and improves thermal coupling consistency. |
Use Scenario: Converting 24 V field sensor signals to 3.3 V logic levels for ARM-based PLC input cards. IC Role / Device Role / Timing Role: Level-shifting buffer with built-in current limiting and noise immunity via resistor-stabilized base bias. Use Value: VI(off) ≤ −0.6 V ensures clean logic-low recognition even under EMI; hFE ≥ 100 guarantees full saturation at 1 mA drive. |
| USB-C Port Power Switching | Medical Sensor Interface Board |
Use Scenario: Enabling/disabling VBUS power paths and CC line pull-up/down in compact USB-C receptacle modules. IC Role / Device Role / Timing Role: Dual-purpose switch controlling both power FET gate bias and CC line termination resistors. Use Value: SOT363 footprint fits within 3.5 mm × 3.5 mm board space; R2/R1 = 21 ensures precise 5.1 kΩ CC pull-down accuracy. |
Use Scenario: Isolating analog front-end enable lines from digital controller in battery-powered patient monitors. IC Role / Device Role / Timing Role: Low-leakage (ICEO ≤ −5 µA at 150 °C) digital isolator for critical power sequencing signals. Use Value: Tj max = 150 °C and storage range −65 °C to +150 °C support sterilization cycles and long-term shelf life requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-PNP switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMD10 | NPN/PNP complement; single NPN + single PNP pair instead of PNP/PNP; different pinout (I1/O1/GND1/I2/O2/GND2 → O1/I1/GND1/O2/I2/GND2) | Suitable where one channel requires sourcing (NPN) and the other sinking (PNP); not drop-in compatible for PNP/PNP layouts | Select when mixed-sourcing/sinking is required and board layout allows pin reassignment. |
| EMX11T2R | PNP/PNP RET with R1 = 10 kΩ, R2 = 100 kΩ; higher bias resistance; VCEO = −50 V, IO = −100 mA; same SOT-363 package | Higher input impedance suits ultra-low-power wake-up circuits; slower switching due to reduced base drive current | Prefer for battery-operated systems requiring <1 µA standby leakage; avoid where fast edge rates (>5 MHz) are needed. |
Compared with PUMD10 and EMX11T2R, PUMB10 offers matched PNP polarity, optimal R1/R2 ratio for TTL/CMOS compatibility, and best-in-class VCE(sat) for minimal conduction loss-making it ideal for dual-active-low control in automotive and industrial logic interfaces.
Availability
PUMB10 is available at Aetrix Electronics and suitable for automotive door modules, industrial PLC input stages, USB-C power management, and medical sensor interface boards requiring stable component supply, AEC-Q101 compliance, and space-constrained SMT integration.
Supply support for PUMB10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert headquartered in Nijmegen, Netherlands, specializing in high-volume production of essential semiconductors for automotive, industrial, and consumer markets.
The PUMB10 belongs to Nexperia's Resistor-Equipped Transistor (RET) family, designed specifically to replace discrete transistor-resistor combinations in digital logic interfacing, level translation, and low-power switching applications.
FAQ
Is PUMB10 pin-compatible with PUMH10 or PUMD10?
No. PUMB10 has a unique pinout (GND1-I1-O2-GND2-I2-O1) optimized for dual-PNP operation. PUMH10 (NPN/NPN) and PUMD10 (NPN/PNP) use different pin assignments and internal configurations. Layout redesign is required for substitution-no mechanical or electrical drop-in replacement exists among these RET variants.
What is the maximum allowable input voltage at I1 or I2 pins?
The absolute maximum input voltage is −12 V (VI), per Table 5. Operation above −5 V risks forward-biasing the base-emitter junction beyond safe limits. For standard 3.3 V or 5 V logic, the VI(on) of −0.75 V (typ) and VI(off) of −0.6 V (max) ensure reliable switching without clamping diodes or external protection.
Can PUMB10 drive a 20 mA LED directly from its O1 or O2 output?
Yes. With IO = −100 mA per channel and VCE(sat) ≤ −100 mV at −5 mA, the device fully supports 20 mA LED loads when supplied from ≤12 V rails. Ensure series current-limiting resistor is sized for target current and forward voltage; no additional driver stage is needed.
Does PUMB10 require external decoupling capacitors for stable operation?
No dedicated decoupling is required for basic switching. However, for high-speed (>5 MHz) or noise-sensitive applications, a 100 nF ceramic capacitor placed between GND1/GND2 and local ground plane improves transient immunity and reduces crosstalk between channels, especially when driving inductive loads.
PUMB10,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 2.2kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 100nA
- Frequency - Transition:
- 180MHz
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMB10,115 FAQ
1.How can I place an order for PUMB10,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMB10,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMB10,115 reliable?
The price and inventory of PUMB10,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB10,115 is usually 5 days.
3.What payment methods are accepted for PUMB10,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB10,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMB10,115?
PUMB10,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMB10,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMB10,115?
For technical support, including PUMB10,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB10,115 requirements.
6.How does Aetrix verify that PUMB10,115 is sourced from the original manufacturer or authorized distributors?
All PUMB10,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB10,115 meets industry standards.
7.What is the process for return or replacement of PUMB10,115?
All PUMB10,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB10,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMB10,115 part is unused and in its original packaging.
Return procedure for PUMB10,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMB10,115 Tags
-
SMUN5311DW1T1G
onsemi
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UMH9NTN
Rohm Semiconductor
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PUMH13,115
Nexperia USA Inc.
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PUMD3-QX
Nexperia USA Inc.
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PUMD2,115
Nexperia USA Inc.
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RN4987FE,LF(CT
Toshiba Semiconductor and Storage
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PUMD12,115
Nexperia USA Inc.
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PUMD9,115
Nexperia USA Inc.
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PUMH9,115
Nexperia USA Inc.
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PUMD3,115
Nexperia USA Inc.
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DCX114EU-7-F
Diodes Incorporated
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PUMD13,115
Nexperia USA Inc.
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