Nexperia USA Inc. PUMB11,135

Overview

PUMB11 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for −50 V V_CEO, −100 mA output current per transistor, with integrated R1 = 10 kΩ and R2 = 10 kΩ bias resistors; used as compact dual-level logic interface or low-current peripheral driver in space-constrained digital control circuits.

For engineers reviewing the PUMB11 datasheet, PUMB11 pinout, PUMB11 application, or PUMB11 equivalent, this device serves as a pre-biased dual PNP switch for IC input control, low-power signal inversion, and discrete logic replacement-requiring verification of V_I(on) (−2.5 to −1.8 V), V_CE(sat) (≤ −100 mV), h_FE (≥30), thermal derating on FR4 PCB, and compatibility with 3.3 V/5 V logic levels.

Technical Context

The PUMB11 integrates two matched PNP transistors with monolithically embedded base bias networks-each with R1 = 10 kΩ (input resistor) and R2 = 10 kΩ (base-emitter feedback resistor), yielding R2/R1 = 1.0 ±0.2. It operates as a dual active-low switch with independent emitter-grounded configuration and collector outputs.

Each transistor supports DC switching up to −100 mA at V_CE ≤ −0.3 V, exhibits f_T = 180 MHz at −10 mA, and maintains h_FE ≥30 from −40 °C to +100 °C. Thermal resistance is 417 K/W (per device, FR4 PCB), enabling operation up to +150 °C junction temperature under defined power limits.

Key Specifications

Pinout & Package

SOT363-3 (TSSOP6) plastic surface-mount package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual PNP RET applications.

Compared with PUMD3 and PUMH11, PUMB11 uniquely provides dual PNP sink capability in fixed SOT363-3 layout-enabling space-efficient, polarity-consistent low-side switching without redesigning PCB routing or recalculating bias networks.

Availability

PUMB11 is available at Aetrix Electronics and suitable for LED indicator control, microcontroller GPIO expansion, logic-level signal inversion, and low-power sensor interface applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for PUMB11 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors-including logic, discretes, MOSFETs, and ESD protection devices-with manufacturing rooted in automotive-grade quality standards.

PUMB11 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace discrete transistor-resistor combinations in digital interface and peripheral driver circuits-reducing design complexity and improving assembly yield.

FAQ

What is the maximum continuous current per transistor in PUMB11?

The PUMB11 supports −100 mA continuous DC output current per transistor under specified thermal conditions (T_amb ≤ 25 °C on FR4 PCB). At higher ambient temperatures, current must be reduced per the 417 K/W thermal resistance derating curve-e.g., ≤ −60 mA at 70 °C ambient-to maintain T_j ≤ 150 °C.

Can PUMB11 be used with 1.8 V logic inputs?

No-PUMB11 requires V_I(on) between −2.5 V and −1.8 V for reliable turn-on, meaning it is designed for 3.3 V or 5 V logic families where the high-state output can pull the base below −1.8 V via its internal R1/R2 network. At 1.8 V, insufficient base drive results in incomplete saturation and elevated V_CE(sat).

Is the R1/R2 ratio adjustable externally?

No-the R1 and R2 resistors are monolithically integrated and not accessible externally. The ratio is fixed at 1.0 ±0.2 (7–13 kΩ for R1, R2/R1 = 0.8–1.2), optimized for standard logic-level interfacing. External resistor modification would require removing the die or using discrete transistors instead.

How does PUMB11 differ from standard PNP transistors like BC807?

Unlike BC807, PUMB11 integrates two matched PNP transistors plus precision bias resistors (R1 = R2 = 10 kΩ) in one SOT363-3 package. This eliminates four external resistors, reduces PCB area by >2 mm², improves assembly yield, and guarantees matched h_FE and V_CE(sat) between channels-critical for balanced dual-channel operation.