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Nexperia USA Inc. PUMB11/ZLF

Part No.:
PUMB11/ZLF
Manufacturer:
Nexperia USA Inc.
Category:
Bipolar Transistor Arrays, Pre-Biased
Package:
6-TSSOP, SC-88, SOT-363
Datasheet:
AetrixPUMB11/ZLF.pdf
Description:
TRANS PREBIAS
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,208

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Product details

Overview

PUMB11 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for −50 V VCEO, −100 mA IO, with integrated R1 = 10 kΩ and R2 = 10 kΩ bias resistors. It functions as a dual low-side switch or logic-level translator in compact digital interface circuits, commonly used in I/O buffering and peripheral control on space-constrained PCBs.

For engineers reviewing the PUMB11 datasheet, PUMB11 pinout, PUMB11 application, or PUMB11 equivalent, this device supports simplified BOM reduction in discrete logic interfacing, offers verified thermal performance up to 150 °C junction temperature, and delivers consistent −1.8 V typical VI(on) and <100 mV VCE(sat) at −10 mA load - critical for 3.3 V/5 V mixed-voltage system design.

Technical Context

The PUMB11 integrates two matched PNP transistors with monolithically embedded base bias resistors, eliminating external pull-up networks. Each transistor features independent emitter-grounded configuration (GND1/GND2), enabling isolated channel operation without shared emitter nodes.

Its R2/R1 ratio of 0.8–1.2 ensures stable current gain control across temperature (−40 °C to +150 °C), while the 3 pF collector capacitance and 180 MHz fT support reliable switching up to ~10 MHz in digital enable/disable applications.

Key Specifications

Parameter Value and Actual Design Meaning
VCEO −50 V: Maximum safe collector-emitter voltage with open base; enables use in 36 V industrial bus interfaces.
IO −100 mA: Continuous output current per transistor; sufficient for driving LED indicators or small relays.
R1 10 kΩ ±30%: Integrated input bias resistor; sets base current without external components.
VCE(sat) ≤ −100 mV at IC = −10 mA, IB = −0.5 mA: Ensures low conduction loss in active-low switching paths.
hFE ≥30 at VCE = −5 V, IC = −5 mA: Guarantees adequate current amplification for logic-level signal inversion.
fT 180 MHz typical: Supports fast edge transitions in clock gating or pulse-width modulation control signals.
Ptot (per device) 300 mW at Tamb = 25 °C: Enables dual-channel operation within thermal limits on standard FR4 PCBs.

Pinout & Package

SOT363-3 (SC-88 / TSSOP6) surface-mount plastic package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering per IPC-J-STD-020.

Pin/Terminal Circuit Role Design Meaning
1 GND1 Emitter connection for TR1; provides dedicated low-impedance return path for first transistor.
2 I1 Base input for TR1; internally connected to R1 and R2; accepts TTL/CMOS-compatible logic levels.
3 O2 Collector output for TR2; active-low switching node; requires external pull-up for open-collector behavior.
4 GND2 Emitter connection for TR2; electrically isolated from GND1 to support dual independent loads.
5 I2 Base input for TR2; identical bias network as I1; enables synchronous or independent channel control.
6 O1 Collector output for TR1; complements O2 for dual-signal routing; shares same electrical specs as O2.

Key Features

Feature Design Value
Dual PNP RET architecture Two fully isolated PNP transistors with matched R1/R2 networks reduce layout area by >40% vs. discrete solutions.
Integrated 10 kΩ bias resistors Eliminates four external resistors per channel, cutting pick-and-place cycles and BOM cost in high-volume consumer PCBs.
−100 mA per channel rating Supports direct drive of optocoupler inputs, small solenoids, or status LEDs without additional driver stages.
Low VCE(sat) (≤ −100 mV) Minimizes power dissipation in always-on control lines, extending battery life in portable instrumentation.
150 °C maximum junction temperature Enables deployment in under-hood automotive modules or enclosed industrial enclosures without forced cooling.

Applications

LED Status Indicators Microcontroller GPIO Expanders

Use Scenario: Driving multiple bi-color or multi-segment LEDs from a microcontroller with limited I/O drive strength.

IC Role / Device Role / Timing Role: Dual-channel active-low current sink for LED anodes tied to VCC.

Use Value: Eliminates need for eight discrete resistors and transistors; reduces board area by 65% versus discrete implementation.

Use Scenario: Adding extra low-side switch outputs to an MCU with saturated GPIO count.

IC Role / Device Role / Timing Role: Logic-level translated output buffer for enabling/disabling peripherals like sensors or level shifters.

Use Value: Provides guaranteed −100 mA sink capability per channel with ≤100 ns turn-off delay at 3.3 V logic.

Industrial Sensor Interface Boards Consumer Appliance Control Panels

Use Scenario: Level-shifting and isolating 24 V sensor alarm outputs to 3.3 V microcontroller inputs.

IC Role / Device Role / Timing Role: Voltage-translating open-collector interface with built-in pull-down biasing.

Use Value: Accepts −24 V input via external resistor while delivering clean 0 V/3.3 V logic levels without external diodes or clamps.

Use Scenario: Controlling backlight dimming and button illumination in white-goods HMI panels.

IC Role / Device Role / Timing Role: Dual PWM-controlled current sink for parallel LED strings.

Use Value: Maintains <±5% current matching between channels across temperature, ensuring uniform brightness.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual PNP RET applications.

Alternative Part Technical Difference Application Difference Selection Advice
PUMD3 NPN/PNP complement; single NPN + single PNP pair; different pinout (I1/O1/GND1/I2/O2/GND2). Required where mixed-signal logic translation (e.g., 5 V → 3.3 V level shift) is needed alongside sinking. Select when circuit requires one NPN and one PNP channel with shared ground reference.
PUMH11 NPN/NPN version; identical package and bias resistor values but opposite polarity; VCEO = +50 V. Suitable for high-side switching or sourcing applications where positive rail control is required. Choose for sourcing loads from VCC rather than sinking to GND, e.g., driving NMOS gate drivers.

Compared with PUMD3 and PUMH11, the PUMB11 uniquely supports dual independent PNP sinking with separate emitter returns - essential for isolated load control in fault-tolerant industrial I/O modules where channel crosstalk must be avoided.

Availability

PUMB11 is available at Aetrix Electronics and suitable for industrial sensor interfaces, consumer appliance control panels, LED status indicator systems, and microcontroller GPIO expansion requiring stable component supply and long-term lifecycle assurance.

Supply support for PUMB11 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-performance, energy-efficient logic, discrete, and MOSFET devices, headquartered in Nijmegen, Netherlands.

The PUMB11 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered to replace discrete transistor-resistor combinations in space- and cost-sensitive digital interface applications.

FAQ

What is the maximum allowable continuous current per channel?

The PUMB11 supports −100 mA continuous output current per transistor under Tamb ≤ 25 °C with proper PCB copper area. Derating is required above 25 °C ambient: power dissipation drops linearly to zero at 150 °C junction temperature, per the 417 K/W per-device thermal resistance specification.

Can PUMB11 be used in 5 V logic systems with 24 V loads?

Yes - the −50 V VCEO rating allows safe operation with 24 V loads when used as a grounded-emitter switch. An external current-limiting resistor must be placed between the 24 V rail and the collector (O1/O2), sized to limit IC to ≤ −100 mA under worst-case VCE(sat) conditions.

Are the two transistors electrically isolated from each other?

Yes - GND1 and GND2 are separate terminals with no internal connection; each transistor operates with its own emitter reference. This enables true galvanic isolation between channels, supporting differential signaling or independent load grounding schemes.

Does PUMB11 require external base resistors?

No - R1 and R2 are monolithically integrated (10 kΩ each). External base resistors are unnecessary for standard logic-level drive; however, a series resistor may be added to I1/I2 if driving from high-voltage sources (>5 V) to limit input current per VI absolute maximum rating of −40 V.

PUMB11/ZLF Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
-
Package/Case:
6-TSSOP, SC-88, SOT-363
Packaging:
Bulk
Product Status:
Obsolete
Transistor Type:
2 PNP - Pre-Biased (Dual)
Current - Collector (Ic) (Max):
100mA
Voltage - Collector Emitter Breakdown (Max):
50V
Resistor - Base (R1):
10kOhms
Resistor - Emitter Base (R2):
10kOhms
DC Current Gain (hFE) (Min) @ Ic, Vce:
30 @ 5mA, 5V
Vce Saturation (Max) @ Ib, Ic:
150mV @ 500µA, 10mA
Current - Collector Cutoff (Max):
1µA
Frequency - Transition:
180MHz
Power - Max:
300mW
Grade:
Automotive
Qualification:
AEC-Q101
Mounting Type:
Surface Mount
Supplier Device Package:
6-TSSOP

PUMB11/ZLF FAQ

1.How can I place an order for PUMB11/ZLF through Aetrix?

Please submit a Request for Quotation (RFQ) for PUMB11/ZLF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PUMB11/ZLF reliable?

The price and inventory of PUMB11/ZLF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB11/ZLF is usually 5 days.

3.What payment methods are accepted for PUMB11/ZLF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB11/ZLF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PUMB11/ZLF?

PUMB11/ZLF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PUMB11/ZLF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PUMB11/ZLF?

For technical support, including PUMB11/ZLF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB11/ZLF requirements.

6.How does Aetrix verify that PUMB11/ZLF is sourced from the original manufacturer or authorized distributors?

All PUMB11/ZLF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB11/ZLF meets industry standards.

7.What is the process for return or replacement of PUMB11/ZLF?

All PUMB11/ZLF units undergo pre-shipment inspection (PSI). If there is an issue with PUMB11/ZLF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PUMB11/ZLF part is unused and in its original packaging.

Return procedure for PUMB11/ZLF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

PUMB11/ZLF Tags

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