Nexperia USA Inc. PUMB17/ZLX

Overview

PUMB17 from Nexperia is a dual PNP resistor-equipped transistor in SOT363 (SC-88) package, featuring integrated bias resistors R1 = 47 kΩ and R2 = 22 kΩ, V_CEO = −50 V, I_O = −100 mA per transistor, and used as compact logic-level peripheral drivers in space-constrained digital control circuits.

For engineers reviewing the PUMB17 datasheet, PUMB17 pinout, PUMB17 application, or PUMB17 equivalent, this page delivers verified electrical parameters, validated dual-transistor pin mapping, real-world driver use cases, and confirmed alternatives for discrete logic interface consolidation.

Technical Context

The PUMB17 integrates two matched PNP transistors with on-chip base bias networks (R1/R2 ratio = 0.47), eliminating external resistors for digital input control. Each transistor operates with V_CE = −5 V, I_C = −5 mA yielding h_FE ≥ 60, and exhibits V_CE(sat) ≤ −150 mV at I_C = −10 mA / I_B = −0.5 mA.

It supports DC switching only - no RF or linear amplification capability - and is rated for T_j ≤ 150 °C with R_th(j-a) = 416 K/W (per device, SOT363). Input voltage limits are −40 V to +10 V, ensuring robustness against transient overvoltage during logic transitions.

Key Specifications

Pinout & Package

SOT363 (SC-88) is a 6-pin, surface-mount plastic package measuring 2.2 mm × 1.8 mm × 1.15 mm, optimized for high-density PCB layouts and reflow soldering only.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual PNP resistor-equipped transistor applications.

Compared with NSVD2T2233PFR and EMX17T2R, PUMB17 offers optimal base current efficiency (R1/R2 = 2.14) for low-power microcontroller interfaces, while retaining strict dual-PNP symmetry essential for matched-channel digital control.

Availability

PUMB17 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, logic-level signal inversion, and low-power sensor enable circuits requiring stable component supply across automotive infotainment, industrial HMI, and consumer IoT programs.

Supply support for PUMB17 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP in 2017 and focused on automotive, industrial, computing, and consumer markets.

PUMB17 belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically to replace general-purpose transistors in digital logic interface applications while minimizing external components and PCB area.

FAQ

What is the maximum junction temperature rating for PUMB17?

The absolute maximum junction temperature (T_j) for PUMB17 is 150 °C, as specified in Table 6 of the official Nexperia datasheet. This rating applies under all operating conditions and must not be exceeded to ensure long-term reliability. Thermal design must account for R_th(j-a) = 416 K/W (per device) on FR4 PCBs with standard footprint.

Can PUMB17 be used in linear amplifier configurations?

No - PUMB17 is characterized and qualified exclusively for switching operation. Its datasheet provides no small-signal parameters (e.g., f_T, C_ob, h_fe vs frequency), and its integrated bias resistors prevent stable DC biasing required for linear amplification. It is intended only for digital on/off control.

Is the SOT363 package RoHS-compliant and lead-free?

Yes - PUMB17 in SOT363 packaging meets RoHS Directive 2011/65/EU and is lead-free, as confirmed by Nexperia's material declarations and compliance documentation. The device uses matte tin (Sn) termination and is compatible with standard lead-free reflow profiles (J-STD-020).

How does the R2/R1 ratio affect switching behavior?

The R2/R1 ratio of 0.47 sets the internal base current division, determining the input voltage threshold (VI(on) ≤ −2.7 V) and ensuring consistent saturation across process and temperature. A lower ratio increases base current, improving drive strength but raising input power; PUMB17's 0.47 ratio balances speed, loss, and noise immunity for 3.3 V logic systems.