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Nexperia USA Inc. PUMB19,115
- Part No.:
- PUMB19,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMB19,115.pdf
- Description:
- TRANS PREBIAS 2PNP 50V 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,133
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Product details
Overview
PUMB19 from Nexperia is a dual PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, featuring integrated 22 kΩ input bias resistors (R1), −50 V VCEO, −100 mA IO, and complementary PNP/PNP configuration for digital switching. It serves as a space- and BOM-optimized replacement for discrete PNP pairs in low-current logic interface and peripheral driver circuits.
For engineers reviewing the PUMB19 datasheet, PUMB19 pinout, PUMB19 application, or PUMB19 equivalent, this page delivers verified electrical parameters, validated dual-transistor pin mapping, thermal derating guidance for SOT363, and direct alternatives with confirmed R1 tolerance and saturation voltage alignment.
Technical Context
The PUMB19 integrates two independent PNP transistors sharing no internal connection-each with its own dedicated 22 kΩ base-input resistor (R1) and open-circuit R2. It operates as a matched pair for push-pull or dual-channel digital signal conditioning without external bias components.
Its design targets DC-coupled, low-speed (<1 MHz) switching where guaranteed hFE ≥ 100 at IC = −1 mA and VCE(sat) ≤ −150 mV at IC = −10 mA enable reliable TTL/CMOS-level translation and IC input control under ambient temperatures from −40 °C to +100 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V - Maximum safe collector-emitter blocking voltage per transistor, enabling use in 24 V industrial IO and 3.3/5 V logic rails with margin. |
| IO | −100 mA - Continuous DC output current rating per channel, supporting LED drivers and relay coil interfaces up to 100 mA load. |
| R1 | 22 kΩ (15.4–28.6 kΩ) - Integrated base bias resistor tolerance ensures predictable turn-on behavior without external component selection effort. |
| VCE(sat) | ≤ −150 mV @ IC = −10 mA, IB = −0.5 mA - Low saturation voltage minimizes power loss and heat generation in active-switching applications. |
| hFE | ≥ 100 @ VCE = −5 V, IC = −1 mA - Sufficient DC gain to drive downstream logic inputs directly from microcontroller GPIOs. |
| Ptot (per device) | 300 mW @ Tamb ≤ 25 °C - Thermal limit for full dual-channel operation on standard FR4 PCB with single-sided copper. |
Pinout & Package
SOT363 (SC-88) 6-pin plastic surface-mounted package: 1.2 mm × 2.2 mm footprint, 0.65 mm pitch, 0.95 mm max height; optimized for high-density routing and reflow-only assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND (emitter) TR1 | Emitter terminal of first PNP transistor; tied to system ground reference for common-emitter switching. |
| 2 | input (base) TR1 | Base node of TR1 with integrated 22 kΩ pull-up resistor to VCC; accepts logic-high input to activate TR1. |
| 3 | output (collector) TR2 | Collector of second PNP transistor; provides active-low output when TR2 is switched on. |
| 4 | GND (emitter) TR2 | Emitter terminal of second PNP transistor; electrically isolated from Pin 1 but same net function. |
| 5 | input (base) TR2 | Base node of TR2 with identical 22 kΩ bias resistor; enables independent control of second channel. |
| 6 | output (collector) TR1 | Collector of first PNP transistor; complements Pin 3 for dual-output digital interfacing. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent PNP RETs | Two fully isolated PNP transistors, each with dedicated 22 kΩ base resistor-no shared nodes or internal coupling. |
| Reduced BOM count | Eliminates need for four external bias resistors in dual-transistor logic buffer designs, cutting component count by ≥66%. |
| Guaranteed R1 tolerance | 22 kΩ ±29% (15.4–28.6 kΩ) ensures consistent base current across production lots without calibration. |
| Low VCE(sat) at rated current | ≤ −150 mV at −10 mA collector current enables <15 mW per channel dissipation in active state. |
| SOT363 thermal performance | Rth(j-a) = 416 K/W (per device) supports 300 mW total dissipation with ≤125 °C junction rise above 25 °C ambient. |
Applications
| Industrial Sensor Interface | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Level-shifting and current amplification for analog sensor outputs feeding PLC input modules. IC Role / Device Role / Timing Role: Dual-channel active-low switch translating 0–5 V sensor signals into 24 V sink-compatible inputs. Use Value: Eliminates discrete resistor networks while maintaining <±5% gain consistency across channels due to matched R1 tolerance. |
Use Scenario: Driving multiple LED indicators or small solenoids from limited GPIO resources on ARM Cortex-M0+ MCUs. IC Role / Device Role / Timing Role: Dual PNP driver providing inverted, current-sinking outputs with built-in base bias. Use Value: Reduces PCB area by 40% vs. dual-SOT23 solution and cuts pick-and-place cycle time by consolidating two devices into one footprint. |
| Legacy TTL Logic Replacement | USB Peripheral Power Control |
|
Use Scenario: Replacing obsolete 2N3906 pairs in legacy industrial control panels requiring drop-in reliability. IC Role / Device Role / Timing Role: Direct functional substitute for dual-PNP configurations used in bus termination and enable/disable gating. Use Value: Matches original VCEO, IO, and hFE specs while adding integrated biasing-no redesign required. |
Use Scenario: Enabling/disabling 5 V USB peripheral power rails based on host controller status signals. IC Role / Device Role / Timing Role: Dual-channel high-side switch controller using PNP emitter-follower configuration. Use Value: Achieves <1 µA standby leakage (ICEO ≤ −1 µA) ensuring compliance with USB suspend current limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NSVD2T2227XV6T1G | R1 = 22 kΩ ±5%; higher hFE (160–400); SOT-563 package (smaller, 1.6 mm × 1.6 mm) | Better gain consistency but tighter layout constraints; not pin-compatible with SOT363 | Select when higher DC gain stability and space reduction outweigh footprint change cost. |
| EMZ6T2R | R1 = 47 kΩ; VCEO = −50 V; same SOT363 package and pinout | Higher input impedance suits weak-drive sources (e.g., open-drain I²C lines), but requires recalculation of base current | Choose for low-power wake-up circuits where 47 kΩ reduces quiescent current by >50% vs. PUMB19. |
Compared with NSVD2T2227XV6T1G and EMZ6T2R, PUMB19 offers balanced R1 tolerance, proven thermal margin in SOT363, and direct compatibility with legacy PNP pair layouts-making it optimal for cost-sensitive industrial replacements where layout reuse is critical.
Availability
PUMB19 is available at Aetrix Electronics and suitable for industrial sensor interfaces, microcontroller GPIO expansion, legacy TTL logic replacement, and USB peripheral power control requiring stable component supply across multi-year production cycles.
Supply support for PUMB19 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP in 2017 and focused on automotive, industrial, computing, and consumer markets.
PUMB19 belongs to Nexperia's resistor-equipped transistor (RET) portfolio, engineered specifically to reduce component count and improve reliability in digital interface and low-power switching applications.
FAQ
Is PUMB19 pin-compatible with PEMB19?
No. PUMB19 uses SOT363 (SC-88) packaging with 0.65 mm lead pitch, while PEMB19 uses SOT666 with 0.5 mm pitch and different pin numbering. Though electrically identical, their footprints are mechanically incompatible-PCB layout redesign is required for substitution.
What is the maximum operating temperature for continuous dual-channel operation?
PUMB19 supports continuous dual-channel operation up to +100 °C ambient temperature when mounted on FR4 with single-sided copper, based on its 300 mW per-device power rating and 416 K/W junction-to-ambient thermal resistance-verified per IEC 60134 limiting values.
Does PUMB19 support reverse taping (T2) for automated placement?
Yes. Per Nexperia's packing information, PUMB19 is available in SOT363 tape-and-reel format with reverse taping option (ordering code suffix -125 or -165), enabling compatibility with pick-and-place machines requiring flipped orientation for vision alignment.
Can PUMB19 replace discrete BC856BS pairs in existing designs?
Yes-with verification of R1 impact. PUMB19's integrated 22 kΩ base resistors eliminate four external resistors, but require confirming that the resulting base current (e.g., ~227 µA at 5 V) meets hFE × IC requirements for the target load, unlike adjustable discrete biasing.
PUMB19,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 22kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 1mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMB19,115 FAQ
1.How can I place an order for PUMB19,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMB19,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMB19,115 reliable?
The price and inventory of PUMB19,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB19,115 is usually 5 days.
3.What payment methods are accepted for PUMB19,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB19,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMB19,115?
PUMB19,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMB19,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMB19,115?
For technical support, including PUMB19,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB19,115 requirements.
6.How does Aetrix verify that PUMB19,115 is sourced from the original manufacturer or authorized distributors?
All PUMB19,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB19,115 meets industry standards.
7.What is the process for return or replacement of PUMB19,115?
All PUMB19,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB19,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMB19,115 part is unused and in its original packaging.
Return procedure for PUMB19,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMB19,115 Tags
-
SMUN5311DW1T1G
onsemi
-
UMH9NTN
Rohm Semiconductor
-
PUMH13,115
Nexperia USA Inc.
-
PUMD3-QX
Nexperia USA Inc.
-
PUMD2,115
Nexperia USA Inc.
-
RN4987FE,LF(CT
Toshiba Semiconductor and Storage
-
PUMD12,115
Nexperia USA Inc.
-
PUMD9,115
Nexperia USA Inc.
-
PUMH9,115
Nexperia USA Inc.
-
PUMD3,115
Nexperia USA Inc.
-
DCX114EU-7-F
Diodes Incorporated
-
PUMD13,115
Nexperia USA Inc.
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