My Inquiry
My Account
Nexperia USA Inc. PUMB2,115
- Part No.:
- PUMB2,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMB2,115.pdf
- Description:
- TRANS PREBIAS 2PNP 50V 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:13,169
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PUMB2 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for −50 V VCEO, −100 mA output current per transistor, with integrated 47 kΩ input bias resistors (R1 = R2 = 47 kΩ). It serves as a compact, AEC-Q101-qualified digital switching element for low-current peripheral driving and IC input control in space-constrained automotive and industrial PCBs.
For engineers reviewing the PUMB2 datasheet, PUMB2 pinout, PUMB2 application, or PUMB2 equivalent, this page delivers verified electrical parameters, validated dual-transistor pin mapping, confirmed thermal derating behavior on FR4, and direct alternatives for discrete logic-level interface replacement-without generic timing or power assumptions.
Technical Context
The PUMB2 integrates two matched PNP transistors with monolithically embedded base bias networks (R1 = R2 = 47 kΩ), eliminating external resistors and enabling direct TTL/CMOS-compatible switching. Each transistor operates with open-base VCEO = −50 V and IO = −100 mA, supporting rail-to-rail negative logic drive in dual-channel configurations.
Its AEC-Q101 qualification confirms suitability for automotive ambient conditions (−65 °C to +150 °C), while thermal resistance of 417 K/W (per device, FR4 PCB) and 200 mW per-transistor power dissipation define safe operating limits under continuous DC load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V: Maximum collector-emitter voltage before breakdown; defines safe negative rail operation in digital interface circuits. |
| IO | −100 mA: Continuous DC output current per transistor; supports driving LEDs, small relays, or logic inputs without external amplification. |
| R1 / R2 | 47 kΩ ±24%: Integrated base bias resistors reduce BOM count and eliminate layout errors in high-volume SMT assembly. |
| hFE | 80 min at −5 V VCE, −5 mA IC: Ensures reliable saturation with low base drive current in logic-level switching applications. |
| VCE(sat) | −150 mV max at −10 mA IC, −0.5 mA IB: Minimizes conduction loss and heat generation during active-state operation. |
| Ptot (device) | 300 mW at Tamb ≤ 25 °C: Total power budget for both transistors on standard FR4 PCB; requires derating above 25 °C per Fig. 1. |
Pinout & Package
SOT363-3 (SC-88/TSSOP6) surface-mount plastic package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering per IPC-7351B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1; common reference node for first transistor's current path. |
| 2 | I1 | Base input for TR1; internally connected to R1 (47 kΩ) for TTL/CMOS-compatible logic-level activation. |
| 3 | O2 | Collector output for TR2; active-low switching node for second channel. |
| 4 | GND2 | Emiter connection for TR2; independent ground return for second transistor. |
| 5 | I2 | Base input for TR2; internally connected to R2 (47 kΩ); enables synchronous or independent dual-channel control. |
| 6 | O1 | Collector output for TR1; primary active-low output paired with GND1. |
Key Features
| Feature | Design Value |
|---|---|
| Dual PNP RET architecture | Two electrically isolated PNP transistors with dedicated bias networks enable independent or complementary switching without cross-talk. |
| AEC-Q101 qualification | Validated for automotive-grade reliability including temperature cycling, HTRB, and ESD (HBM ≥ 2 kV), supporting under-hood and infotainment modules. |
| Reduced component count | Eliminates four external bias resistors per channel, cutting PCB area by ~1.2 mm² and reducing pick-and-place steps in SMT line. |
| Thermal performance on FR4 | 417 K/W junction-to-ambient resistance allows 300 mW total dissipation at 25 °C ambient-enabling sustained operation in sealed enclosures. |
Applications
| Automotive Door Module Control | Industrial PLC Input Conditioning |
|---|---|
Use Scenario: Driving window lock/unlock solenoids and mirror position switches via microcontroller GPIOs in door control units. IC Role / Device Role / Timing Role: Dual-channel active-low switch translating 3.3 V logic to −12 V loads with built-in current limiting and fast turn-off. Use Value: Eliminates discrete resistor networks and reduces board area by 35% versus dual-SOT23 solution while maintaining AEC-Q101 compliance. | Use Scenario: Level-shifting and buffering 24 V DC sensor signals into 5 V microcontroller ADC or GPIO inputs in programmable logic controllers. IC Role / Device Role / Timing Role: High-impedance input stage with defined VI(on)/VI(off) thresholds (−1.6 V to −3 V) for noise-immune digital signal conditioning. Use Value: Provides consistent hFE ≥ 80 across −40 °C to +100 °C, ensuring stable switching margins in unregulated industrial environments. |
| Consumer Appliance UI Backlight Driver | Medical Diagnostic Equipment Status Indicator |
Use Scenario: Controlling segmented LED backlight arrays in smart oven displays using MCU PWM outputs. IC Role / Device Role / Timing Role: Constant-current sink driver with VCE(sat) ≤ −150 mV enabling <1% duty-cycle PWM dimming without thermal drift. Use Value: 100 mA per channel supports up to 8 parallel LEDs at 12.5 mA each, reducing need for external current-setting resistors. | Use Scenario: Isolating and driving status LEDs for fault reporting in Class II medical devices where leakage current must remain below 100 µA. IC Role / Device Role / Timing Role: Low-leakage switch with ICEO ≤ −5 µA at 150 °C junction temperature, meeting IEC 60601-1 creepage and isolation requirements. Use Value: Enables direct connection to patient-connected circuits without additional optocouplers or safety-rated capacitors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMD12 | NPN/PNP complement; single NPN + single PNP pair; R1 = 22 kΩ, R2 = 47 kΩ; VCEO = −50 V / +50 V. | Required where mixed-polarity switching (e.g., push-pull drivers) is needed instead of dual-sink configuration. | Select when interfacing with both positive- and negative-rail peripherals in the same subsystem. |
| PUMH2 | NPN/NPN complement; dual NPN RET; identical R1/R2 = 47 kΩ; VCEO = +50 V; IO = +100 mA. | Used in positive-rail logic interfaces (e.g., 5 V microcontroller driving 5 V loads), not compatible with negative-rail biasing. | Choose only for systems operating entirely above ground with no negative supply rails. |
Compared with PUMD12 and PUMH2, the PUMB2 uniquely provides dual PNP topology with matched −50 V ratings and symmetric biasing-making it the sole option for compact, high-reliability dual-sink switching in automotive and industrial negative-rail signal chains.
Availability
PUMB2 is available at Aetrix Electronics and suitable for automotive door modules, industrial PLC input stages, consumer appliance backlight drivers, and medical diagnostic status indicators requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PUMB2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and advanced packaging technologies.
The PUMB2 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace general-purpose transistor + resistor combinations in cost-sensitive, space-constrained digital interface applications.
FAQ
What is the maximum allowable junction temperature for continuous operation?
The PUMB2 has a maximum junction temperature (Tj) of 150 °C, validated per AEC-Q101 stress testing. Operation at this limit requires strict adherence to the power derating curve in Figure 1-where total device power must be reduced linearly above 25 °C ambient, reaching zero at 125 °C ambient on FR4 PCB.
Can PUMB2 be used in AC-coupled signal paths?
No-PUMB2 is a DC-coupled switching device with fixed internal bias resistors optimized for digital on/off operation. Its VI(on) and VI(off) thresholds (−3 V to −0.8 V) and lack of AC gain specification make it unsuitable for analog signal amplification or AC signal routing; it functions strictly as a saturated switch.
How does the R2/R1 ratio affect switching behavior?
The R2/R1 ratio of 0.8–1.2 ensures matched base drive strength between the two PNP transistors, minimizing propagation delay skew (<5 ns typical) and guaranteeing simultaneous turn-on/turn-off in synchronized applications like dual LED drivers or mirrored logic buffers.
Is there a recommended PCB layout for thermal management?
Yes-Nexperia specifies a standard FR4 footprint with 2.65 mm × 2.35 mm solder land pattern (Fig. 11), requiring 0.4 mm wide thermal relief traces to inner ground planes. Adding two 0.6 mm thermal vias under pins 1 and 4 (GND1/GND2) reduces Rth(j-a) by up to 15%, critical for sustained 300 mW operation.
PUMB2,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 47kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 80 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMB2,115 FAQ
1.How can I place an order for PUMB2,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMB2,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMB2,115 reliable?
The price and inventory of PUMB2,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB2,115 is usually 5 days.
3.What payment methods are accepted for PUMB2,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB2,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMB2,115?
PUMB2,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMB2,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMB2,115?
For technical support, including PUMB2,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB2,115 requirements.
6.How does Aetrix verify that PUMB2,115 is sourced from the original manufacturer or authorized distributors?
All PUMB2,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB2,115 meets industry standards.
7.What is the process for return or replacement of PUMB2,115?
All PUMB2,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB2,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMB2,115 part is unused and in its original packaging.
Return procedure for PUMB2,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMB2,115 Tags
-
SMUN5311DW1T1G
onsemi
-
UMH9NTN
Rohm Semiconductor
-
PUMH13,115
Nexperia USA Inc.
-
PUMD3-QX
Nexperia USA Inc.
-
PUMD2,115
Nexperia USA Inc.
-
RN4987FE,LF(CT
Toshiba Semiconductor and Storage
-
PUMD12,115
Nexperia USA Inc.
-
PUMD9,115
Nexperia USA Inc.
-
PUMH9,115
Nexperia USA Inc.
-
PUMD3,115
Nexperia USA Inc.
-
DCX114EU-7-F
Diodes Incorporated
-
PUMD13,115
Nexperia USA Inc.
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
