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Nexperia USA Inc. PUMB30,115
- Part No.:
- PUMB30,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMB30,115.pdf
- Description:
- TRANS PREBIAS 2PNP 50V 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,656
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Product details
Overview
PUMB30 from Nexperia is a dual PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, integrating two matched PNP transistors with built-in 2.2 kΩ input bias resistors and open R2 configuration. It delivers −100 mA output current per transistor, −50 V VCEO, and operates up to 150 °C junction temperature - used for low-current peripheral driving and IC input control in space-constrained logic interfaces.
For engineers reviewing the PUMB30 datasheet, PUMB30 pinout, PUMB30 application, or PUMB30 equivalent, this device serves as a cost-saving, component-count-reducing alternative to discrete BC857BS/BC857BV pairs in level-shifting, bus buffering, and digital signal conditioning circuits where simplified biasing and SMT placement efficiency are critical.
Technical Context
The PUMB30 integrates two independent PNP transistors sharing no internal connection between collectors or emitters - each with its own dedicated 2.2 kΩ base-input resistor (R1) and unconnected R2 terminal. Its dual-emitter-grounded topology enables direct use as complementary switch pairs without external bias networks.
Designed for DC-coupled digital interface applications, it supports IO control at ≤−100 mA per channel with guaranteed VCEsat ≤ −150 mV at IC = −10 mA / IB = −0.5 mA, and exhibits <3 pF collector capacitance for minimal signal loading in high-speed enable/disable paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V - supports reliable switching of 3.3 V, 5 V, and 12 V logic rails with margin against transients |
| IO | −100 mA per transistor - sufficient for driving LEDs, small relays, or CMOS/TTL inputs directly |
| R1 | 2.2 kΩ ±30% - eliminates need for external base resistors in standard 3.3 V/5 V microcontroller GPIO interfacing |
| VCEsat | ≤ −150 mV at IC = −10 mA - ensures low power loss and minimal voltage drop in active-low switching paths |
| Ptot (per device) | 300 mW at Tamb ≤ 25 °C - enables operation in compact PCB layouts without forced cooling |
| Cc | 3 pF - preserves signal integrity in ≤10 MHz digital enable/control lines |
| hFE | ≥30 at IC = −20 mA - guarantees robust saturation under typical microcontroller drive conditions |
Pinout & Package
SOT363 (SC-88) 6-pin surface-mount plastic package with gull-wing leads; 2 mm × 1.25 mm footprint; 0.65 mm pitch; pin 1 marked by notch or bevel.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND (emitter) TR1 | Common emitter reference for first transistor; ties to system ground or local return path |
| 2 | input (base) TR1 | Resistor-biased base node - accepts direct logic-level input without external pull-up/down |
| 3 | output (collector) TR2 | Active-low output node for second transistor; sinks current when TR2 is on |
| 4 | GND (emitter) TR2 | Independent emitter return for second transistor - allows separate grounding or level shifting |
| 5 | input (base) TR2 | Second resistor-biased base - enables independent control of both transistors from separate GPIOs |
| 6 | output (collector) TR1 | Active-low output node for first transistor; electrically isolated from TR2's collector |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent PNP RETs | Two fully isolated PNP switches with dedicated bias resistors - eliminates inter-channel crosstalk in mixed-signal routing |
| Integrated R1 = 2.2 kΩ | Enables direct connection to 3.3 V/5 V MCU outputs without external components - reduces BOM count by ≥4 passives per channel |
| R2 = open configuration | Allows flexible biasing: R2 omission simplifies design for standard inverter/driver use while retaining option to add external feedback if needed |
| −100 mA per channel rating | Supports driving multiple parallel logic inputs or low-power peripherals without derating or heatsinking |
| SOT363 thermal resistance | Rth(j-a) = 416 K/W (per device) - maintains safe junction temperature below 150 °C at full load in typical FR4 PCB environments |
Applications
| LED Indicator Control | Microcontroller GPIO Expansion |
|---|---|
|
Use Scenario: Driving multiple status LEDs from limited GPIO resources on an ARM Cortex-M0+ MCU. IC Role / Device Role / Timing Role: Dual active-low switch enabling simultaneous control of two red/green LED pairs with single supply rail. Use Value: Eliminates four external base resistors and two discrete transistors - reduces board area by 35% vs. discrete solution. |
Use Scenario: Expanding 3.3 V I/O capability for industrial sensor interface boards requiring 12-bit ADC enable signals and reset control. IC Role / Device Role / Timing Role: Level-translating and current-boosting buffer for MCU GPIOs driving higher-capacitance enable lines. Use Value: Guarantees ≤150 mV VCEsat at 10 mA ensures clean 0 V assertion for ADC EN and RESET pins under varying load conditions. |
| Bus Line Driver | Logic-Level Translation |
|
Use Scenario: Driving bidirectional I²C pull-up lines in mixed-voltage systems (e.g., 1.8 V MCU ↔ 5 V sensor). IC Role / Device Role / Timing Role: Active-pull-down element replacing MOSFET-based translators in low-frequency (<400 kHz) I²C segments. Use Value: 3 pF collector capacitance minimizes rise-time degradation; −100 mA rating handles worst-case bus short-circuit currents. |
Use Scenario: Converting 1.8 V LVTTL outputs to 5 V TTL-compatible inputs in legacy industrial controller backplanes. IC Role / Device Role / Timing Role: Inverting level shifter with built-in bias network - accepts low-voltage input and sinks 5 V rail current. Use Value: 2.2 kΩ R1 ensures full saturation at 1.8 V input; −50 V VCEO provides margin against 5 V rail overshoot during hot-plug events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual PNP resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BC857BS | Discrete dual PNP pair without integrated resistors - requires 4 external 2.2 kΩ base resistors | Higher BOM count and placement cost; suitable only when design requires adjustable bias or R2 feedback | Select when precise hFE matching or variable base drive is required beyond fixed RET architecture |
| EMH11T2R | PNP/NPN complementary RET with R1 = 10 kΩ / R2 = 10 kΩ - different resistor values and polarity mix | Not interchangeable for pure PNP-only functions; requires circuit redesign for base drive polarity and gain assumptions | Choose only for complementary switching topologies (e.g., push-pull drivers), not as drop-in replacement |
Compared with BC857BS and EMH11T2R, PUMB30 offers lower assembly cost and smaller footprint via monolithic integration of matched PNP RETs with optimized 2.2 kΩ biasing - making it superior for fixed-ratio, space-constrained, low-power digital interface applications.
Availability
PUMB30 is available at Aetrix Electronics and suitable for LED indicator control, microcontroller GPIO expansion, bus line driving, and logic-level translation requiring stable component supply across industrial automation, consumer electronics, and embedded instrumentation programs.
Supply support for PUMB30 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP in 2017 and focused on automotive, industrial, computing, and consumer markets.
PUMB30 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered to reduce component count and simplify digital interface design in high-volume SMT applications.
FAQ
What is the maximum operating temperature for PUMB30?
The PUMB30 has a maximum junction temperature (Tj) of 150 °C and a storage temperature range of −65 °C to +150 °C. Its thermal resistance Rth(j-a) is 416 K/W per device on FR4 PCB, allowing full −100 mA operation at ambient temperatures up to +85 °C without derating when mounted per recommended footprint.
Can PUMB30 replace BC857BS in existing designs?
Yes - PUMB30 serves as a direct functional replacement for BC857BS in most PNP-switching applications, eliminating four external base resistors and reducing PCB area. Pin compatibility is not identical (SOT363 vs. SOT363 for BC857BS), but layout adaptation is minimal due to shared SC-88 footprint and identical pin 1 orientation.
Is R2 internally connected or accessible?
R2 is open (unconnected) in PUMB30 - no internal connection exists between the R2 node and any other terminal. This configuration simplifies use as a standard inverter/driver; adding external R2 is possible via PCB trace if feedback or modified biasing is required.
What soldering method is recommended for PUMB30?
Reflow soldering is the only recommended method for PUMB30, per Nexperia's datasheet. Wave soldering is not advised due to thermal stress risks. The device uses standard SOT363 reflow footprint dimensions (2.65 mm × 2.35 mm pad layout) compatible with IPC-7351B Class B density guidelines.
PUMB30,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 2.2kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 20mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMB30,115 FAQ
1.How can I place an order for PUMB30,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMB30,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMB30,115 reliable?
The price and inventory of PUMB30,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB30,115 is usually 5 days.
3.What payment methods are accepted for PUMB30,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB30,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMB30,115?
PUMB30,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMB30,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMB30,115?
For technical support, including PUMB30,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB30,115 requirements.
6.How does Aetrix verify that PUMB30,115 is sourced from the original manufacturer or authorized distributors?
All PUMB30,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB30,115 meets industry standards.
7.What is the process for return or replacement of PUMB30,115?
All PUMB30,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB30,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMB30,115 part is unused and in its original packaging.
Return procedure for PUMB30,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMB30,115 Tags
-
SMUN5311DW1T1G
onsemi
-
UMH9NTN
Rohm Semiconductor
-
PUMH13,115
Nexperia USA Inc.
-
PUMD3-QX
Nexperia USA Inc.
-
PUMD2,115
Nexperia USA Inc.
-
RN4987FE,LF(CT
Toshiba Semiconductor and Storage
-
PUMD12,115
Nexperia USA Inc.
-
PUMD9,115
Nexperia USA Inc.
-
PUMH9,115
Nexperia USA Inc.
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PUMD3,115
Nexperia USA Inc.
-
DCX114EU-7-F
Diodes Incorporated
-
PUMD13,115
Nexperia USA Inc.
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