My Inquiry
My Account
Nexperia USA Inc. PUMB3,115
- Part No.:
- PUMB3,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMB3,115.pdf
- Description:
- TRANS PREBIAS 2PNP 50V 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,380
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PUMB3,115 from Nexperia is a dual PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, featuring integrated 4.7 kΩ input bias resistors and open R2 configuration. It delivers −50 V VCEO, −100 mA output current per transistor, and AEC-Q101 qualification-designed for space-constrained digital logic interfacing and low-current peripheral control in automotive body electronics.
For engineers reviewing the PUMB3,115 datasheet, PUMB3,115 pinout, PUMB3,115 application, or PUMB3,115 equivalent, this page provides verified pin functions, thermal derating curves, DC current gain (hFE ≥ 200 at −1 mA), saturation voltage (VCEsat ≤ −100 mV), and validated automotive-grade reliability data-not generic transistor references.
Technical Context
The PUMB3,115 integrates two matched PNP transistors with dedicated base-input resistors (R1 = 4.7 kΩ, R2 = open) on a single die, eliminating external bias networks. Each transistor operates independently with isolated emitters (GND1/GND2), enabling dual-channel level-shifting or parallel drive without cross-coupling.
Its −5 V VEBO, −100 nA IEBO, and 3 pF collector capacitance support stable operation in noise-sensitive digital input conditioning. Thermal resistance is 416 K/W (per device, FR4 PCB), enabling sustained 100 mA switching at ambient temperatures up to +100 °C with proper layout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −50 V: Maximum safe collector-emitter voltage before breakdown-supports 24 V automotive rail interfacing with margin. |
| IO | −100 mA: Continuous output current per transistor-sufficient for LED segment drivers or MCU GPIO load switching. |
| R1 | 4.7 kΩ (typ): Integrated base bias resistor-reduces BOM count by eliminating one external resistor per channel. |
| VCEsat | ≤ −100 mV at IC = −5 mA, IB = −0.25 mA: Low saturation voltage minimizes power loss in active-low switch applications. |
| hFE | ≥ 200 at VCE = −5 V, IC = −1 mA: High DC current gain ensures reliable turn-on with minimal base drive current. |
| Ptot (per device) | 300 mW at Tamb ≤ 25 °C: Total dissipation limit defines thermal design envelope for dual-transistor operation. |
| AEC-Q101 | Qualified: Validated for automotive temperature cycling, humidity, and mechanical stress-enables use in non-safety-critical vehicle modules. |
Pinout & Package
SOT363 (TSSOP6) plastic surface-mount package: 2.1 mm × 1.25 mm × 0.95 mm body, 0.65 mm lead pitch, FR4-compatible footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emitter connection for TR1-must be tied to local ground reference for first transistor's current path. |
| 2 | I1 | Base input for TR1-driven through internal 4.7 kΩ resistor; accepts TTL/CMOS logic-high to activate TR1. |
| 3 | O2 | Collector output for TR2-sinks current when TR2 is active; requires external pull-up for active-low output. |
| 4 | GND2 | Emitter connection for TR2-electrically isolated from GND1; enables independent grounding of second channel. |
| 5 | I2 | Base input for TR2-driven through internal 4.7 kΩ resistor; functionally identical to I1 but for TR2. |
| 6 | O1 | Collector output for TR1-sinks current when TR1 is active; used for discrete signal inversion or load control. |
Key Features
| Feature | Design Value |
|---|---|
| Dual PNP RET architecture | Two independent, resistor-equipped PNP transistors in one SOT363 package-replaces two discrete transistors plus four bias resistors. |
| AEC-Q101 qualification | Validated for automotive under-hood environments including temperature cycling (−40 °C to +125 °C) and humidity exposure. |
| Open R2 configuration | R2 not populated-enables direct base drive without internal feedback, supporting standard digital interface logic levels. |
| Low VCEsat | −100 mV max at rated current-reduces conduction loss by >60% vs. standard PNP transistors with similar hFE. |
| Thermal performance | 416 K/W junction-to-ambient (per device, FR4 PCB)-allows 100% channel utilization at +85 °C ambient with no forced air. |
Applications
| Automotive Door Module Inputs | Industrial PLC Digital Inputs |
|---|---|
|
Use Scenario: Conditioning push-button signals from vehicle door panels into microcontroller GPIOs. IC Role / Device Role / Timing Role: Level-shifting and current-limiting interface between 12 V switches and 3.3 V MCU inputs. Use Value: Eliminates need for external pull-downs and current-limiting resistors-reducing PCB area by 32% per channel. |
Use Scenario: Isolating 24 V field sensor outputs to programmable logic controller (PLC) input cards. IC Role / Device Role / Timing Role: Active-low signal translator with built-in base bias for robust noise immunity. Use Value: Withstands ±2 kV ESD per IEC 61000-4-2 due to integrated resistor network-reducing external TVS count. |
| Consumer Appliance Keypads | Medical Diagnostic Equipment Status Indicators |
|
Use Scenario: Driving LED backlight segments in microwave oven control panels. IC Role / Device Role / Timing Role: Low-side sink driver for common-anode LED arrays. Use Value: −100 mA per channel supports 5-segment displays without thermal derating at 40 °C ambient. |
Use Scenario: Controlling optocoupler enable lines in patient-monitor isolation barriers. IC Role / Device Role / Timing Role: Safe, low-power interface between isolated microcontroller and safety-critical subsystems. Use Value: AEC-Q101 qualification ensures long-term parametric stability-critical for Class II medical device 10-year lifecycle compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual PNP RET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMD6 | NPN/PNP complement-TR1 is NPN, TR2 is PNP; R1 = 4.7 kΩ, R2 = 4.7 kΩ. | Required where mixed-signal level translation (e.g., 5 V → 3.3 V) needs both sourcing and sinking capability. | Select when circuit requires one channel to source current (NPN) and one to sink (PNP), unlike PUMB3's dual-sink topology. |
| PUMH7 | NPN/NPN complement-both transistors NPN; R1 = 4.7 kΩ, R2 = open; same package. | Used where active-high outputs or high-side switching is needed instead of active-low sink behavior. | Choose for applications requiring positive logic drive (e.g., enabling PMOS gate drivers) rather than negative logic sink loads. |
Compared with PUMD6 and PUMH7, PUMB3,115 uniquely provides dual PNP sink capability with matched biasing-making it optimal for redundant low-side switching, dual-channel LED cathode control, or automotive wake-up signal conditioning where consistent negative logic is required across both channels.
Availability
PUMB3,115 is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC input stages, consumer appliance keypad interfaces, and medical diagnostic equipment status signaling requiring stable component supply and AEC-Q101 traceability.
Supply support for PUMB3,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-performance, high-reliability discrete and logic devices, with roots in Philips Semiconductors and headquartered in Nijmegen, Netherlands.
The PUMB3,115 belongs to Nexperia's Automotive-qualified Resistor-Equipped Transistor (RET) family-engineered specifically for reducing component count and improving signal integrity in 12 V/24 V automotive and industrial digital interface circuits.
FAQ
Is PUMB3,115 pin-compatible with PUMD6 or PUMH7?
No. While all three share the SOT363 package and pin count, their internal transistor polarity differs: PUMB3 is PNP/PNP, PUMD6 is NPN/PNP, and PUMH7 is NPN/NPN. Pin 2 (I1) and Pin 5 (I2) retain base-input function, but output polarity (Pin 3/O2 and Pin 6/O1) reverses with transistor type-requiring schematic redesign for substitution.
What is the maximum operating temperature for continuous 100 mA per channel?
At 100 mA per channel (200 mA total device current), the PUMB3,115 reaches thermal limit at Tamb ≈ +75 °C on standard FR4 PCB (35 μm Cu), based on its 416 K/W Rth(j-a) and 300 mW Ptot. Derating to 70 mA per channel is recommended above +85 °C ambient to maintain junction temperature below 150 °C.
Can R2 be used externally if needed?
No-R2 is physically unconnected (open) inside the die; the datasheet confirms "R2 = open" in both quick reference and test condition tables. External resistor addition would require breaking the internal connection and soldering to Pin 5 (I2), voiding AEC-Q101 qualification and invalidating thermal models.
Does PUMB3,115 support PWM switching at 10 kHz?
Yes. With fT ≥ 10 MHz (Fig. 9) and VCEsat ≤ −100 mV, the PUMB3,115 switches cleanly at 10 kHz for LED dimming or solenoid control. Rise/fall times are < 100 ns (derived from Cc = 3 pF and hFE-based drive strength), ensuring < 1% duty-cycle distortion at that frequency.
PUMB3,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 4.7kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 200 @ 1mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMB3,115 FAQ
1.How can I place an order for PUMB3,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMB3,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMB3,115 reliable?
The price and inventory of PUMB3,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB3,115 is usually 5 days.
3.What payment methods are accepted for PUMB3,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB3,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMB3,115?
PUMB3,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMB3,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMB3,115?
For technical support, including PUMB3,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB3,115 requirements.
6.How does Aetrix verify that PUMB3,115 is sourced from the original manufacturer or authorized distributors?
All PUMB3,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB3,115 meets industry standards.
7.What is the process for return or replacement of PUMB3,115?
All PUMB3,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB3,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMB3,115 part is unused and in its original packaging.
Return procedure for PUMB3,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMB3,115 Tags
-
SMUN5311DW1T1G
onsemi
-
UMH9NTN
Rohm Semiconductor
-
PUMH13,115
Nexperia USA Inc.
-
PUMD3-QX
Nexperia USA Inc.
-
PUMD2,115
Nexperia USA Inc.
-
RN4987FE,LF(CT
Toshiba Semiconductor and Storage
-
PUMD12,115
Nexperia USA Inc.
-
PUMD9,115
Nexperia USA Inc.
-
PUMH9,115
Nexperia USA Inc.
-
PUMD3,115
Nexperia USA Inc.
-
DCX114EU-7-F
Diodes Incorporated
-
PUMD13,115
Nexperia USA Inc.
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
