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Nexperia USA Inc. PUMB4,115

Part No.:
PUMB4,115
Manufacturer:
Nexperia USA Inc.
Category:
Bipolar Transistor Arrays, Pre-Biased
Package:
6-TSSOP, SC-88, SOT-363
Datasheet:
AetrixPUMB4,115.pdf
Description:
TRANS PREBIAS 2PNP 50V 6TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:7,779

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Product details

Overview

PUMB4 from Nexperia is a dual PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, configured as two independent PNP transistors with integrated 10 kΩ base bias resistors (R1) and open R2 terminals. It delivers −50 V VCEO, −100 mA IO per transistor, and −150 mV VCEsat at IC = −10 mA/IB = −0.5 mA, enabling compact digital logic interface and low-current peripheral driving in space-constrained PCBs.

For engineers reviewing the PUMB4 datasheet, PUMB4 pinout, PUMB4 application, or PUMB4 equivalent, this device serves as a drop-in replacement for discrete PNP pairs in level-shifting, bus buffering, and microcontroller I/O conditioning-where simplified BOM, reduced placement steps, and guaranteed bias network matching are critical selection criteria.

Technical Context

The PUMB4 integrates two isolated PNP transistors sharing no internal connection between collector-emitter paths; each has its own dedicated 10 kΩ input resistor (R1) tied to base, while R2 remains unconnected (open). This architecture eliminates external bias components and ensures consistent turn-on behavior across temperature.

It operates within −65 °C to +150 °C ambient range, supports reflow-only soldering, and exhibits 416 K/W junction-to-ambient thermal resistance per device on FR4 PCB-enabling reliable operation in thermally dense industrial control modules and automotive body electronics without forced cooling.

Key Specifications

ParameterValue and Actual Design Meaning
VCEO−50 V: Maximum safe collector-emitter voltage before breakdown in open-base configuration.
IO (DC)−100 mA per transistor: Continuous output current capability without derating at Tamb ≤ 25 °C.
VCEsat−150 mV at IC = −10 mA/IB = −0.5 mA: Low saturation voltage enables efficient switching with minimal power loss.
R110 kΩ (7–13 kΩ range): Integrated base bias resistor ensures predictable turn-on threshold and eliminates external component tolerance stack-up.
Ptot (device)300 mW at Tamb ≤ 25 °C: Total power dissipation limit for both transistors combined on standard FR4 board.
hFE200 min at VCE = −5 V, IC = −1 mA: Guaranteed DC current gain supports robust digital switching even under marginal drive conditions.
Cc3 pF at VCB = −10 V, f = 1 MHz: Low collector capacitance preserves signal integrity in >100 MHz digital edge transitions.

Pinout & Package

Package: SOT363 (SC-88), plastic surface-mounted, 6-lead, 2.2 mm × 1.8 mm footprint, 0.65 mm pitch, 0.1 mm max height.

Pin/TerminalCircuit RoleDesign Meaning
1Emitter of TR1Current sink node for first PNP transistor; connects directly to load return path.
2Base of TR1Input node with internal 10 kΩ resistor to Pin 6 (collector of TR1); accepts TTL/CMOS-compatible logic high to activate TR1.
3Collector of TR2Output node for second PNP transistor; ties to supply rail when TR2 is active.
4Emitter of TR2Current sink node for second PNP transistor; used for dual-channel independent switching.
5Base of TR2Input node with internal 10 kΩ resistor to Pin 3 (collector of TR2); electrically isolated from TR1's base network.
6Collector of TR1Output node for first PNP transistor; also provides bias path for TR1 via internal R1.

Key Features

FeatureDesign Value
Built-in bias resistorsTwo matched 10 kΩ R1 resistors eliminate need for external pull-up/pull-down networks and reduce layout sensitivity to parasitic coupling.
Independent dual-PNP topologyNo shared terminals between TR1 and TR2-enables fully isolated channel control for redundant sensing or dual-rail interfacing.
Low VCEsat−150 mV saturation voltage minimizes conduction loss in 3.3 V/5 V logic-level switching applications, improving system efficiency.
Thermal performance416 K/W Rth j-a (per device) allows sustained 300 mW dissipation on standard FR4 without heatsinking in ambient ≤ 70 °C environments.

Applications

LED Driver InterfaceMicrocontroller I/O Expander

Use Scenario: Driving multiple low-current indicator LEDs from a 3.3 V MCU GPIO bank with limited sink capability.

IC Role / Device Role / Timing Role: Dual PNP switch providing active-low LED anode control with built-in biasing to avoid GPIO overload.

Use Value: Eliminates four external resistors per channel, reduces PCB area by 35%, and guarantees consistent LED brightness across channels.

Use Scenario: Extending GPIO count for industrial sensor polling using a single 6-pin package instead of discrete transistors.

IC Role / Device Role / Timing Role: Level translator and current buffer between 1.8 V sensor outputs and 5 V PLC input stages.

Use Value: Enables direct connection without level-shifter ICs; maintains <10 ns propagation delay due to low Cc and optimized saturation.

Bus Line DriverPower Sequencing Control

Use Scenario: Isolating and driving bidirectional I²C bus lines in mixed-voltage systems (e.g., 3.3 V MCU ↔ 5 V EEPROM).

IC Role / Device Role / Timing Role: PNP-based open-drain driver stage with integrated pull-up bias for clean signal rise/fall edges.

Use Value: Prevents bus contention during hot-plug events; R1 ensures defined idle state without external pull-ups.

Use Scenario: Enabling/disabling auxiliary power rails in FPGA-based embedded systems based on sequenced enable signals.

IC Role / Device Role / Timing Role: Dual-channel high-side switch controlling PMOS gate drive for two independent 12 V/5 V rails.

Use Value: Guarantees simultaneous turn-on of both rails within 50 ns skew; R1 stabilizes gate voltage during slow-rising enable edges.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-PNP resistor-equipped transistor applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
NSVDU2D143XZT1GSingle PNP RET (not dual); R1 = 4.7 kΩ; SOT-523 package; lower VCEO (−30 V).Limited to single-channel use; unsuitable for coordinated dual-rail control or space-constrained dual-signal routing.Select only when board area is extremely constrained and dual functionality is unnecessary.
EMB12PDual PNP RET in SOT-563; R1 = 10 kΩ; identical VCEO/IO but higher VCEsat (−200 mV); 0.65 mm pitch same as PUMB4.Slightly higher conduction loss; compatible pinout but different marking and thermal resistance (450 K/W vs 416 K/W).Acceptable substitute if existing layout accommodates SOT-563 footprint and 50 mV higher VCEsat is tolerable.

Compared with NSVDU2D143XZT1G and EMB12P, PUMB4 uniquely balances dual-channel integration, 0.65 mm pitch compatibility, −150 mV VCEsat, and 416 K/W thermal resistance-making it optimal for high-density industrial I/O modules where channel pairing and thermal margin are co-critical.

Availability

PUMB4 is available at Aetrix Electronics and suitable for industrial I/O expansion, automotive body control modules, and consumer appliance logic interfacing requiring stable component supply and long-term manufacturing continuity.

Supply support for PUMB4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global leader in high-volume production of discrete semiconductors, specializing in automotive-grade reliability, AEC-Q101 qualified devices, and scalable packaging for industrial and consumer markets.

PUMB4 belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically to replace discrete transistor-resistor combinations in digital interface circuits-reducing assembly cost and improving functional consistency across production batches.

FAQ

What is the maximum operating temperature for PUMB4?

The PUMB4 supports junction temperatures up to 150 °C and ambient operating temperatures from −65 °C to +150 °C. Its thermal resistance is 416 K/W per device on standard FR4, so at 25 °C ambient, full 300 mW dissipation is permissible without exceeding Tj = 150 °C.

Can PUMB4 be used as a high-side switch for 12 V loads?

Yes-each PNP transistor supports −50 V VCEO and −100 mA continuous current, making it suitable for 12 V high-side switching with appropriate base drive. The integrated 10 kΩ R1 resistor requires ~1.2 mA base current from a 3.3 V logic source to ensure saturation, which is within typical MCU GPIO sink limits.

Is there a complementary NPN/NPN version of PUMB4?

Yes-the PUMD4 is the NPN/NPN complement in the same SOT363 package, with identical R1 = 10 kΩ bias resistors and matching pinout. It shares the same thermal and electrical specifications except polarity, enabling symmetrical design of push-pull or differential interface stages.

Does PUMB4 require external decoupling capacitors?

No-PUMB4 does not integrate any active circuitry requiring bypassing. However, for high-speed switching (>1 MHz), a 100 nF ceramic capacitor placed near the VCC connection point of the driven load improves transient response and reduces ground bounce in shared PCB return paths.

PUMB4,115 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
-
Package/Case:
6-TSSOP, SC-88, SOT-363
Packaging:
Tape & Reel (TR)
Product Status:
Active
Transistor Type:
2 PNP - Pre-Biased (Dual)
Current - Collector (Ic) (Max):
100mA
Voltage - Collector Emitter Breakdown (Max):
50V
Resistor - Base (R1):
10kOhms
Resistor - Emitter Base (R2):
-
DC Current Gain (hFE) (Min) @ Ic, Vce:
200 @ 1mA, 5V
Vce Saturation (Max) @ Ib, Ic:
150mV @ 500µA, 10mA
Current - Collector Cutoff (Max):
1µA
Frequency - Transition:
-
Power - Max:
300mW
Grade:
Automotive
Qualification:
AEC-Q100
Mounting Type:
Surface Mount
Supplier Device Package:
6-TSSOP

PUMB4,115 FAQ

1.How can I place an order for PUMB4,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for PUMB4,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PUMB4,115 reliable?

The price and inventory of PUMB4,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMB4,115 is usually 5 days.

3.What payment methods are accepted for PUMB4,115?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMB4,115 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PUMB4,115?

PUMB4,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PUMB4,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PUMB4,115?

For technical support, including PUMB4,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMB4,115 requirements.

6.How does Aetrix verify that PUMB4,115 is sourced from the original manufacturer or authorized distributors?

All PUMB4,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMB4,115 meets industry standards.

7.What is the process for return or replacement of PUMB4,115?

All PUMB4,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMB4,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PUMB4,115 part is unused and in its original packaging.

Return procedure for PUMB4,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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