NXP Semiconductors PUMB9,115

Overview

PUMB9 from Nexperia is a PNP/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for −50 V V_CEO, −100 mA output current per transistor, with integrated bias resistors R1 = 10 kΩ and R2 = 47 kΩ. It functions as a dual-channel digital switching element for low-current logic interfacing and peripheral control in space-constrained automotive and industrial PCBs.

For engineers reviewing the PUMB9 datasheet, PUMB9 pinout, PUMB9 application, or PUMB9 equivalent, this page delivers verified electrical parameters, validated AEC-Q101 qualification status, confirmed SOT363-3 thermal derating behavior, and real-world use cases in IC input control and discrete transistor replacement scenarios.

Technical Context

The PUMB9 integrates two matched PNP transistors with on-chip base bias networks-R1 (input resistor) and R2 (feedback resistor)-enabling direct TTL/CMOS-level input drive without external bias components. Each channel operates independently with open-base V_CEO = −50 V and I_O = −100 mA rating.

Its internal resistor ratio R2/R1 = 4.7 ensures stable saturation under varying temperature (−40 °C to +150 °C), while built-in emitter-grounded configuration simplifies PCB layout for dual-signal inversion or level-shifting tasks in 3.3 V/5 V mixed-voltage systems.

Key Specifications

Pinout & Package

SOT363-3 (SC-88) 6-pin surface-mount plastic package with 0.65 mm pitch, 2.2 mm × 1.35 mm footprint, and exposed pad-less construction optimized for reflow soldering on FR4 PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-PNP resistor-equipped transistor applications.

Compared with PUMD9 and PUMH9, the PUMB9 uniquely supports dual active-low switching in negative-rail architectures-critical for automotive CAN/LIN bus interfaces and legacy industrial controllers using open-collector signaling.

Availability

PUMB9 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC input stages, consumer appliance UI panels, and medical diagnostic equipment requiring stable component supply and AEC-Q101 compliance.

Supply support for PUMB9 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The PUMB9 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, designed specifically to replace discrete transistor-resistor combinations in cost-sensitive, space-constrained digital interface applications.

FAQ

What is the maximum junction temperature for continuous operation of PUMB9?

The absolute maximum junction temperature (T_j) is 150 °C per the datasheet Limiting Values table. For continuous operation, thermal design must ensure junction temperature stays below this limit under worst-case ambient and power dissipation conditions-typically requiring derating above 25 °C ambient per the 417 K/W R_th(j-a) curve.

Can PUMB9 be used in a 1.8 V logic interface?

No-PUMB9's VI(on) is specified down to −0.8 V (typical) at I_C = −1 mA, and its VI(off) is −0.5 V (max). A 1.8 V logic high would exceed the −0.5 V off-threshold, causing unintended conduction. It is intended for 3.3 V or 5 V systems where logic low is near 0 V and logic high is ≥2.0 V.

Is the R1/R2 resistor network accessible externally?

No-the bias resistors are monolithically integrated inside the die and not brought out to pins. Pins 2 (I1) and 5 (I2) connect only to the internal base nodes; no external access to R1 or R2 terminals is provided. This integration eliminates trimming or calibration but fixes the bias ratio at 4.7.

Does PUMB9 support parallel operation of both transistors for higher current?

No-PUMB9's two transistors share no internal thermal or electrical coupling for current sharing. Each channel is rated for −100 mA individually, but simultaneous full-load operation requires verifying total power dissipation (≤300 mW) and thermal resistance (417 K/W) to avoid exceeding T_j = 150 °C. Derating is mandatory for dual-channel 100 mA use.