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Nexperia USA Inc. PUMD10,115
- Part No.:
- PUMD10,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD10,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:16,956
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Product details
Overview
PUMD10 from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (TSSOP6) package, with built-in bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ, rated for 50 V VCEO and 100 mA output current per transistor, commonly used in low-current digital interface buffering and IC input control circuits.
For engineers reviewing the PUMD10 datasheet, PUMD10 pinout, PUMD10 application, or PUMD10 equivalent, this device serves as a space- and BOM-optimized replacement for discrete NPN+PNP pairs in level-shifting, logic translation, and peripheral driver stages where bias network integration reduces layout complexity and improves assembly yield.
Technical Context
The PUMD10 implements two monolithically integrated BJTs - TR1 (NPN) and TR2 (PNP) - each with dedicated on-die base bias networks (R1 + R2), enabling direct TTL/CMOS-compatible switching without external resistors. The dual-transistor topology supports complementary signal inversion or push-pull drive configurations.
Each transistor operates independently with separate emitter (GND1/GND2), base (I1/I2), and collector (O1/O2) terminals. The R2/R1 ratio of 21 typ ensures stable DC biasing across temperature, while fT values of 230 MHz (NPN) and 180 MHz (PNP) support high-speed digital switching up to ~10 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V max per transistor - supports rail-to-rail operation in 3.3 V, 5 V, and 12 V logic systems with margin against transients. |
| IO | 100 mA max per transistor - sufficient for driving LEDs, small relays, MOSFET gates, or multiple CMOS inputs. |
| R1 | 2.2 kΩ typ - sets base current for standard logic-level turn-on at 3.3–5 V inputs with ~1.5 mA IB. |
| R2/R1 | 21 typ - provides optimized feedback ratio for reliable saturation and noise immunity in digital switching. |
| fT (TR1) | 230 MHz typ - enables clean edge response in pulse-width modulation and clocked interface applications. |
| hFE | 100 min at IC = 10 mA - ensures robust current gain under typical digital load conditions. |
| VCE(sat) | 100 mV max at IC = 5 mA, IB = 0.25 mA - minimizes conduction loss and self-heating in continuous-duty drivers. |
Pinout & Package
SOT363-3 (TSSOP6) surface-mount plastic package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering with standardized land pattern per JEDEC MO-178.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference for first transistor's current path. |
| 2 | I1 | Base input for TR1 (NPN); accepts logic-high signal to activate NPN output O1. |
| 3 | O2 | Collector output for TR2 (PNP); sinks current when TR2 is active (low-side switch or inverting stage). |
| 4 | GND2 | Emiter connection for TR2 (PNP); common reference for second transistor's current path. |
| 5 | I2 | Base input for TR2 (PNP); accepts logic-low or active-low signal to activate PNP output O2. |
| 6 | O1 | Collector output for TR1 (NPN); sources current when TR1 is active (high-side switch or non-inverting stage). |
Key Features
| Feature | Design Value |
|---|---|
| Dual NPN/PNP RET topology | Enables complementary output staging in one footprint - eliminates need for two discrete RETs or four passive resistors. |
| Integrated R1/R2 bias network | Reduces PCB area by ≥2.5 mm² vs. discrete solution and removes manual resistor placement error risk. |
| 100 mA per transistor rating | Supports direct drive of optocouplers, small solenoids, or multiple 74HC-series inputs without external amplification. |
| 230 MHz fT (NPN) | Ensures <50 ns propagation delay in 5 V logic interfaces, suitable for UART, SPI, and GPIO expansion applications. |
| JEDEC-compliant TSSOP6 | Enables automated pick-and-place with standard vision alignment and reflow profiles (J-STD-020 Class 3). |
Applications
| LED Driver Interface | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Driving multiplexed 20 mA indicator LEDs from 3.3 V MCU pins with voltage translation to 5 V supply rails. IC Role / Device Role: NPN (TR1) switches LED anodes to 5 V; PNP (TR2) sinks cathode current to GND - forming active-high/active-low dual control. Use Value: Eliminates four external resistors per channel and reduces routing congestion on dense MCU boards. |
Use Scenario: Extending limited GPIO count on ARM Cortex-M0+ microcontrollers to manage 8-bit parallel bus signals for sensors or displays. IC Role / Device Role: Each PUMD10 provides two buffered, level-shifted outputs - one NPN for sourcing, one PNP for sinking - per GPIO pair. Use Value: Enables bidirectional signal conditioning without adding discrete transistors or level-shifter ICs. |
| Logic-Level Translator | Low-Power Peripheral Control |
|
Use Scenario: Converting 1.8 V FPGA I/O signals to 5 V TTL levels for legacy industrial peripherals. IC Role / Device Role: TR1 (NPN) acts as a level-up shifter; TR2 (PNP) provides inverted output for complementary enable/disable signaling. Use Value: Achieves sub-10 ns delay skew between channels and maintains <1 µA standby current per channel. |
Use Scenario: Controlling power sequencing of three low-voltage subsystems (e.g., RF module, sensor hub, memory) in battery-powered IoT nodes. IC Role / Device Role: PUMD10 drives enable inputs of three independent LDOs using coordinated NPN/PNP outputs to ensure strict power-up order. Use Value: Guarantees monotonic voltage ramping with no shoot-through risk, reducing system reset events by >99% in field testing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMB10 | PNP/PNP dual RET - identical R1/R2 values but both transistors are PNP. | Used where dual-sinking (active-low) outputs are required, e.g., driving common-anode LED arrays or open-collector buses. | Select when complementary sourcing capability is unnecessary and board layout favors uniform PNP polarity. |
| PUMH10 | NPN/NPN dual RET - same R1/R2, but both transistors are NPN. | Preferred for dual-sourcing applications like driving multiple gate inputs or pull-up networks in I²C-like buses. | Choose when high-side switching dominates the design and no PNP-level inversion is needed. |
Compared with PUMB10 and PUMH10, the PUMD10 uniquely supports mixed-signal interfacing within one device - its NPN/PNP pairing enables true push-pull output stages, bidirectional level translation, and reduced component count in designs requiring both sourcing and sinking capability.
Availability
PUMD10 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, logic-level translation, and low-power peripheral control requiring stable component supply across industrial, consumer, and automotive-adjacent electronics programs.
Supply support for PUMD10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - including logic, discretes, MOSFETs, and ESD protection - serving automotive, industrial, and mobile markets.
The PUMD10 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace discrete BJT-resistor combinations in cost- and space-constrained digital interface applications.
FAQ
What is the maximum operating temperature for PUMD10?
The PUMD10 has a maximum junction temperature (Tj) of 150 °C and an ambient operating range of −65 °C to +150 °C. Its thermal resistance is 417 K/W (per device, FR4 PCB), meaning at 25 °C ambient and 100 mW dissipation, junction temperature rises by ~42 °C - well within safe limits for most industrial applications.
Can PUMD10 be used in analog amplifier configurations?
No - the PUMD10 is optimized for digital switching, not linear amplification. Its built-in resistors fix the base bias point, and hFE variation (100–300) and lack of emitter degeneration make it unsuitable for stable small-signal gain. It should only be used in saturated-switch or logic-buffer roles per datasheet specifications.
Is PUMD10 automotive qualified?
No - the PUMD10 is not AEC-Q101 qualified. Nexperia explicitly states in its legal disclaimers that unless otherwise specified, products like PUMD10 are "non-automotive qualified" and not tested to automotive reliability or environmental standards. Use in automotive applications requires customer validation and full liability assumption.
How does the R2/R1 ratio affect switching behavior?
The R2/R1 ratio of 21 typ provides negative feedback that stabilizes the base current against VBE drift and temperature variation. This ensures consistent saturation (VCE(sat) ≤ 100 mV) across −40 °C to +125 °C, preventing partial turn-on and reducing dynamic power loss during transitions in high-frequency digital use.
PUMD10,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 2.2kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 100nA (ICBO)
- Frequency - Transition:
- 230MHz
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD10,115 FAQ
1.How can I place an order for PUMD10,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD10,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD10,115 reliable?
The price and inventory of PUMD10,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD10,115 is usually 5 days.
3.What payment methods are accepted for PUMD10,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD10,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD10,115?
PUMD10,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD10,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD10,115?
For technical support, including PUMD10,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD10,115 requirements.
6.How does Aetrix verify that PUMD10,115 is sourced from the original manufacturer or authorized distributors?
All PUMD10,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD10,115 meets industry standards.
7.What is the process for return or replacement of PUMD10,115?
All PUMD10,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD10,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD10,115 part is unused and in its original packaging.
Return procedure for PUMD10,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD10,115 Tags
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SMUN5311DW1T1G
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