Nexperia USA Inc. PUMD10,125

Overview

PUMD10 from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (SC-88) package, rated for 50 V V_CEO, 100 mA output current per transistor, with built-in bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ. It serves as a compact logic-level interface device for bidirectional signal conditioning in space-constrained digital control circuits.

For engineers reviewing the PUMD10 datasheet, PUMD10 pinout, PUMD10 application, or PUMD10 equivalent, this component is selected for low-current peripheral driver functions where reduced external component count, simplified base drive design, and dual-polarity switching capability are required in industrial I/O, microcontroller GPIO expansion, and level-shifting interfaces.

Technical Context

The PUMD10 integrates two discrete transistors-TR1 (NPN) and TR2 (PNP)-with monolithically embedded bias networks: R1 connects input to base, R2 provides base-to-emitter feedback. Each transistor operates independently with open-base V_CEO = 50 V and I_O = 100 mA rating, supporting complementary switching without external resistors.

Its internal resistor ratio R2/R1 = 21 typ enables stable saturation under standard TTL/CMOS logic drive levels (V_I(on) = 0.75–1.1 V), while thermal resistance R_th(j-a) = 417 K/W (per device) supports operation up to 150 °C junction temperature on FR4 PCBs.

Key Specifications

Pinout & Package

SOT363-3 (SC-88) surface-mount plastic package: 6-pin TSSOP with 0.65 mm pitch, 2.2 mm × 1.35 mm body, 0.95 mm max height, and exposed pad not present. Designed for reflow soldering per JEDEC J-STD-020.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Compared with PUMB10 and PUMH10, the PUMD10 uniquely supports true complementary logic translation-enabling single-device implementation of push-pull drivers, H-bridge pre-drivers, and bidirectional bus buffers without polarity inversion logic.

Availability

PUMD10 is available at Aetrix Electronics and suitable for industrial I/O expansion, microcontroller peripheral interfacing, and USB-C port control applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for PUMD10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency-enhancing components-specializing in high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The PUMD10 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered to replace legacy discrete transistor-resistor combinations in cost-sensitive, space-constrained digital interface designs while guaranteeing production-ready parametric stability.

FAQ

What is the maximum operating temperature for continuous use of the PUMD10?

The PUMD10 has a maximum junction temperature (T_j) of 150 °C and an ambient operating range of –65 °C to +150 °C. When mounted on a standard FR4 PCB with single-sided 35 µm copper, it sustains full 100 mA per transistor up to +85 °C ambient; derating begins above that point per the 417 K/W thermal resistance curve.

Can the PUMD10 be used in automotive applications?

No-the PUMD10 is not AEC-Q101 qualified and is explicitly designated as a non-automotive product in Nexperia's legal disclaimers. It lacks automotive-grade qualification testing (e.g., HTOL, TC, ESD), and its data sheet states it is "not suitable for life-critical or safety-critical systems." Use only in industrial, consumer, or computing applications.

How does the internal R2/R1 ratio affect switching behavior?

The R2/R1 ratio of 21 typ ensures strong negative feedback to the base, forcing deep saturation (V_CE(sat) ≤ 100 mV) and sharp cutoff (I_C ≤ 100 nA). This ratio stabilizes gain against process variation and temperature drift, reducing sensitivity to supply voltage fluctuations and enabling reliable operation across 1.8 V to 5.5 V logic families.

Is there a recommended PCB footprint for the SOT363-3 package?

Yes-Nexperia specifies a reflow soldering footprint with 0.6 mm × 0.5 mm solder pads (4 per side), 0.4 mm solder mask openings (2 per side), and 2.65 mm × 1.35 mm overall land pattern. The wave soldering variant uses 0.6 mm × 1.5 mm pads aligned for preferred transport direction; both footprints are documented in Figures 20 and 21 of the datasheet.